EPM5032DC-20 vs EPM5032DC-15 비교
다음의 상세 나란히 비교: EPM5032DC-20 제조: Intel 및 EPM5032DC-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 Obsolete사양 비교
| 파라미터 | EPM5032DC-20 | EPM5032DC-15 |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $5.05 | $9.95 |
| Product Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | UV-erasable EPLD (PAL-type CMOS) |
| Programmable Technology | UV-Erasable / OTP EPROM | — |
| Usable Gates | 600 | 600 |
| Macrocells | 32 | 32 |
| Maximum Frequency (fCNT) | 71.4 MHz | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | — |
| Supply Voltage (VCC) | 5 V | 5 V (nominal) |
| 패키지 | 20-pin DIP (Windowed Ceramic, 0.3" wide) | CERDIP-28 (windowed, through-hole) |
| 실장 유형 | Through-Hole | Through-Hole (DIP) |
| Logic Blocks | 4 Logic Array Blocks (LABs) | — |
| I/O Pins | [DATA_NEEDED: I/O pin count for DIP-20 variant] | — |
| 동작 온도 | [DATA_NEEDED: commercial/industrial/military grade] | 0C to +70C (commercial) |
| RoHS 상태 | Compliant (per IC-Components listing) | [DATA_NEEDED: RoHS status] |
| Lead Free | [DATA_NEEDED: confirmed lead-free] | — |
| Manufacturer | Altera (now Intel Programmable Solutions Group) | — |
| Programming Method | Altera MAX+PLUS II / Quartus (legacy support) | — |
| Family | — | MAX 5000 |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Logic Family | — | CMOS, TTL-compatible I/O |
| Programmable Pins | — | 16 bidirectional I/O + 4 dedicated input = 20 |
| Total Package Pins | — | 28 |
| Erasure Method | — | UV light through ceramic quartz window |
| Process Technology | — | CMOS |
| Lead-Free | — | unknown |