EPM5192ALC84-15 vs EPM5192AJM84-15 비교
다음의 상세 나란히 비교: EPM5192ALC84-15 제조: Altera 및 EPM5192AJM84-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5192ALC84-15 | EPM5192AJM84-15 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $13.20 | $21.00 |
| Device Family | MAX 5000 (EPM5192) | — |
| Device Type | CPLD / UV-Erasable / OTP Complex PLD | UV Erasable Programmable Logic Device (EPLD) |
| Macrocells | 192 | 192 |
| Dedicated Inputs | 7 | — |
| User I/O Pins | 64 | 84 |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Propagation Delay (Industry Variant) | 25 ns (per MicrochipUSA listing) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | — |
| Process Technology | CMOS (EPROM-based) | 5 V CMOS, UV-EPROM |
| Programmability | UV-erasable window / OTP | — |
| 패키지 | 84-pin PLCC (QCCJ, J-bend ceramic) | 84-pin ceramic J-lead (JM84) |
| Operating Temperature Grade | Commercial | — |
| Terminal Form | J-BEND | — |
| Package Code | QCCJ | — |
| Package Shape | SQUARE | — |
| Architecture | Programmable Logic Array + Macrocell Registers + PIA interconnect | — |
| Family | — | MAX 5000 |
| Speed Grade | — | -15 (15 ns tPD) |
| Maximum Operating Frequency | — | 83.3 MHz |
| 실장 유형 | — | Surface Mount (ceramic J-lead) |
| 동작 온도 범위 | — | -55C to +125C (military grade) |
| 공급 전압 | — | [DATA_NEEDED: VCC range] |
| Erase Method | — | Ultraviolet (windowed ceramic package) |
| Programming Method | — | EPROM-style (programmer + UV erase) |
| I/O Standard | — | TTL-compatible CMOS |
| Development Tool | — | Altera MAX+PLUS II |
| RoHS 상태 | — | Non-compliant (ceramic with UV window) |
| 수명 주기 상태 | — | Obsolete (EOL by Altera, now supported by Microchip / 3rd-party distributors) |