EPM5192LC-25 vs EPM5192JC-1 비교

다음의 상세 나란히 비교: EPM5192LC-25 제조: Altera 및 EPM5192JC-1 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5192LC-25 EPM5192JC-1
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $55.00 $22.40
Product Type CPLD (Complex Programmable Logic Device) —
Family MAX 5000 MAX 5000
Macrocells 192 192
Logic Elements 192 (1 macrocell ≈ 1 LE in MAX 5000 architecture) —
Pin-to-Pin Delay (tPD) 25 ns —
Speed Grade -25 (25 ns) —
패키지 JLCC-84 (ceramic J-lead chip carrier) —
실장 유형 Surface Mount —
Programmable Technology UV-erasable / OTP (EPROM-based) —
Programming Interface JTAG / Altera programming hardware (legacy) Altera MAX programming interface (parallel, pre-JTAG for this family)
동작 온도 0C to +70C (commercial) 0 C to +70 C (commercial)
공급 전압 5 V (typical, MAX 5000) —
I/O Standard TTL-compatible TTL/CMOS 5 V compatible
Configuration Memory Non-volatile EPROM (on-chip) UV-EPROM (erasable under UV lamp)
Manufacturer Altera Corporation (now Intel PSG) —
RoHS 상태 Unknown (legacy ceramic package typically non-RoHS) —
Device Type — CPLD - Complex Programmable Logic Device
Technology — CMOS, UV-Erasable / OTP
Usable Gates — 3750
Propagation Delay (tPD) — 40 ns (speed grade -1)
Maximum Internal Frequency (fMAX) — 62.5 MHz
Supply Voltage (VCC) — 4.75 V to 5.25 V
User I/O Pins — 84
Package Type — 84-pin Ceramic Quad Flat Pack (CQFP), windowed
JEDEC Package Code — S-CQCC-J84
Process — CMOS EPROM

데이터시트 & 자료

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