EPM7128SLC84-15 vs EPM7160SLC84-15 비교

다음의 상세 나란히 비교: EPM7128SLC84-15 제조: Intel 및 EPM7160SLC84-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM7128SLC84-15 EPM7160SLC84-15
브랜드 Intel Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 최종 구매 Obsolete
재고 상태 In Stock In Stock
단가 (USD) $10.40 $10.80
Family MAX 7000S MAX 7000
Device Type CPLD - Complex Programmable Logic Device —
Macrocells 128 160
Usable Gates 2,500 3,200
User I/Os 68 (in 84-PLCC) —
패키지 84-Pin PLCC (J-Lead, J84) —
Speed Grade -15 (15 ns pin-to-pin delay) —
Propagation Delay (tPD) 15 ns —
Maximum Internal Frequency (fMAX) 76.9 MHz —
Logic Family / Process CMOS, 5V, EEPROM —
Supply Voltage (VCCINT) 5 V —
I/O Standard Support 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V) —
Programming Interface JTAG (IEEE Std. 1149.1), in-system programmable JTAG (IEEE 1149.1) in-system programmable
Configuration Memory Non-volatile EEPROM (instant-on, no boot PROM) —
동작 온도 0C to +70C (commercial) 0 C to 70 C
RoHS 상태 Non-RoHS (legacy 5V part) Not RoHS compliant (contains lead, SnPb finish typical)
실장 유형 Surface Mount / Socketed (PLCC-84 socket) Surface Mount (PLCC socket or direct solder)
Maximum Propagation Delay — 15 ns
Maximum User I/O Pins — 64
Supply Voltage (VCCINT/VCIO) — 4.75 V to 5.25 V (5 V nominal)
I/O Logic Level — Configurable 3.3 V or 5 V
Technology — CMOS, EEPROM configuration
Package Type — PLCC-84 (PQCC84, JEDEC S-PQCC-J84)
Terminal Pitch — 1.270 mm
Lifecycle — Obsolete / last-time-buy (per Altera/Intel PDN)

데이터시트 & 자료

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