EPM7160STC100-10 vs EPM7160STC100-10N 비교
다음의 상세 나란히 비교: EPM7160STC100-10 제조: Intel 및 EPM7160STC100-10N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Intel
EPM7160STC100-10 - MAX 7000S CPLD, 160 Macrocells, 100-pin TQFP | Intel
EPM7160STC100-10 ⚠ 최종 구매Altera
EPM7160STC100-10N - MAX 7000 CPLD, 160 Macrocells, TQFP-100 | Altera
EPM7160STC100-10N Obsolete사양 비교
| 파라미터 | EPM7160STC100-10 | EPM7160STC100-10N |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 최종 구매 | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $15.90 | $15.95 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 160 | — |
| User I/Os | 84 | 84 |
| Usable Gates | 3,200 | — |
| Logic Elements | 160 macrocells / 10 Logic Array Blocks | — |
| Supply Voltage (VCC) | 5.0 V (4.75 V - 5.25 V) | — |
| Propagation Delay (tPD1) | 10 ns | — |
| Global Clock Setup Time | 6 ns | — |
| Internal Counter Frequency | 100 MHz | — |
| Technology | CMOS, EEPROM-based | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| 패키지 | 100-pin TQFP | TQFP-100 (1 mm height, plastic) |
| 동작 온도 | 0 C to +70 C (commercial) | 0C to +70C (Commercial) |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | Non-RoHS (legacy Altera part; -10N variant is RoHS) | [DATA_NEEDED: RoHS status] |
| Macrocells | — | 160 |
| Equivalent Gates | — | 3.2K |
| Propagation Delay (tPD) | — | 10 ns |
| Internal Operating Frequency | — | 167 MHz max |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| I/O Voltage (VCCIO) | — | 3.0 V to 5.25 V (MultiVolt) |
| Logic Family | — | CMOS |
| Programmable Type | — | In-System Programmable (ISP) via JTAG |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG (IEEE 1149.1) | — | Yes |
| PCI Compliance | — | Yes (66 MHz) |
| MSL 레벨 | — | [DATA_NEEDED: MSL level] |