EPM7256AEQI208-7N vs EPM7256AEFI256-7 비교
다음의 상세 나란히 비교: EPM7256AEQI208-7N 제조: Altera 및 EPM7256AEFI256-7 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM7256AEQI208-7N | EPM7256AEFI256-7 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $0.00 | $18.75 |
| Family | MAX 7000A | — |
| Macrocells | 256 | — |
| Usable Gates | 5,000 | — |
| User I/O Pins | 164 | — |
| Logic Array Blocks | 16 | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency | 126.6 MHz | — |
| 공급 전압 | 3.3 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| 패키지 | 208-pin PQFP (FQFP) | — |
| Number of Terminals | 208 | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| 실장 유형 | Surface Mount | Surface Mount (BGA) |
| Operating Temperature Grade | Industrial | — |
| Speed Grade | -7 | — |
| RoHS 상태 | Compliant (N suffix) | [DATA_NEEDED: rohs status] |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Series | — | MAX 7000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programmable Type | — | In System Programmable (ISP) via JTAG (IEEE 1149.1) |
| Number of Macrocells | — | 256 |
| Number of Logic Array Blocks (LABs) | — | 16 |
| Number of Gates | — | 5000 (usable gates) |
| Number of I/O | — | 164 |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V nominal) |
| I/O Voltage (VCCIO) | — | Multi-volt: 2.5 V / 3.3 V / 5.0 V tolerant |
| Max Propagation Delay (tPD) | — | 7.5 ns |
| Max Counter Frequency (fCNT) | — | 126.6 MHz |
| PCI Compatibility | — | PCI SIG 33 MHz, PCI Local Bus Specification Rev 2.2 (speed grades -4, -5, -6, -7) |
| 동작 온도 | — | -40 C to +85 C (Industrial) |
| 패키지 / 케이스 | — | 256-FBGA (17 x 17 mm) |
| Process Technology | — | CMOS with EEPROM configuration memory |