EPM9320LC84-10 vs EPM9320ALC84-10 비교

다음의 상세 나란히 비교: EPM9320LC84-10 제조: Intel 및 EPM9320ALC84-10 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM9320LC84-10 EPM9320ALC84-10
브랜드 Intel Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 NRND Obsolete
재고 상태 In Stock In Stock
단가 (USD) $84.96 $19.80
Family MAX 9000 EPLD MAX 9000
Device EPM9320 EPM9320
Macrocells 320 320
Usable Gates 6000 (typical) —
Logic Array Blocks (LABs) 16 16
Maximum User I/O Pins 168 (varies by package) 52
Pin-to-Pin Logic Delay (tPD) 10 ns —
Maximum Frequency (fCNT) [DATA_NEEDED: fCNT in MHz] —
Supply Voltage (VCC) 5.0 V (typical, see datasheet) —
Process Technology 0.7 µm CMOS EEPROM/UV-EPROM —
패키지 84-pin PLCC (JEDEC MO-047) 84-pin PLCC (J-Lead)
실장 유형 Surface Mount (PLCC socket also common) Surface Mount / Through-Hole (PLCC socket)
동작 온도 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix] [DATA_NEEDED: commercial/industrial grade]
Programming Interface JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible —
Configuration Non-volatile EEPROM (instant-on, no boot PROM) —
RoHS 상태 ROHS3 Compliant (per fpgalink listing) [DATA_NEEDED]
습도 민감도 레벨 (MSL) MSL-3, 168 hours (per fpgalink listing) —
Manufacturer Lead Time 1-7 days (per fpgalink listing) —
Dedicated Inputs — 16
Speed Grade — -10 (10 ns pin-to-pin delay)
Pin-to-Pin Delay (tPD) — 10 ns
Supply Voltage (VCCINT) — 5.0 V
In-System Programmability — 5.0 V ISP via IEEE 1149.1 JTAG
Technology — CMOS EEPROM-based, third-generation MAX
PCI Compliance — PCI Local Bus Specification Rev. 2.2 (speed grade -10)
Non-Volatile Configuration — Yes (EEPROM cell, powers up in known state)
Architecture — MAX (Multiple Array MatriX) with FastTrack Interconnect

데이터시트 & 자료

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