EPM9560GC280-20 vs EPM9560GI280-20 비교

다음의 상세 나란히 비교: EPM9560GC280-20 제조: Altera 및 EPM9560GI280-20 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM9560GC280-20 EPM9560GI280-20
브랜드 Altera Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete NRND
재고 상태 In Stock In Stock
단가 (USD) $360.00 $162.50
Family MAX 9000 —
Device Type CPLD (Complex Programmable Logic Device) —
Usable Gates 12,000 12,000
Macrocells 560 560
Maximum User I/O 212 —
Pin-to-Pin Delay 20 ns (speed grade -20) —
Counter Frequency (max) 100 MHz —
Supply Voltage (VCCINT) 4.75 V to 5.25 V (5.0 V nominal) —
I/O Voltage 3.3 V or 5.0 V configurable —
Process Technology CMOS EEPROM —
패키지 280-pin CPGA (Ceramic Pin Grid Array) 280-pin PGA (PIN/PEG, square)
동작 온도 [DATA_NEEDED: commercial/industrial/military grade] —
In-System Programming Yes, via IEEE 1149.1 JTAG —
실장 유형 Through-Hole (CPGA socket) —
RoHS 상태 [DATA_NEEDED: CPGA package historically contains Pb; likely non-compliant] [DATA_NEEDED: RoHS status for GI PGA package]
Device Family — MAX 9000
Architecture — CMOS EEPROM-based Multiple Array MatriX (MAX)
Technology Node — 5.0 V CMOS EEPROM
Logic Array Blocks (LABs) — 28 (16 macrocells each)
Maximum User I/O Pins — 216
Flip-Flops — 772
Pin-to-Pin Delay (Speed Grade) — 20 ns
Supply Voltage (VCC) — 5.0 V
In-System Programmability — Yes (IEEE Std. 1149.1 JTAG)
Programming Technology — EEPROM (non-volatile)
Terminal Form — PIN/PEG (through-hole PGA)
Package Code — PGA
Temperature Grade — Industrial
I/O Pin DC Input Range — -0.5 V to VCC + 0.5 V
Dedicated-Input Pin DC Input Range — -0.3 V to VCC + 0.3 V
I/O Transient Envelope (no-load, <20 ns) — -2.0 V undershoot to 7.0 V overshoot
VCC Ramp Requirement — Monotonic rise
Development Tool — Altera MAX+PLUS II
Supported HDLs — VHDL, Verilog HDL, AHDL

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