EPM9560GI280-20 vs EPM9560GM280-15 비교
다음의 상세 나란히 비교: EPM9560GI280-20 제조: Intel 및 EPM9560GM280-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM9560GI280-20 | EPM9560GM280-15 |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $162.50 | $110.00 |
| Device Family | MAX 9000 | — |
| Architecture | CMOS EEPROM-based Multiple Array MatriX (MAX) | — |
| Technology Node | 5.0 V CMOS EEPROM | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 28 (16 macrocells each) | 35 (16 macrocells each) |
| Usable Gates | 12,000 | — |
| Maximum User I/O Pins | 216 | — |
| Flip-Flops | 772 | 772 |
| Pin-to-Pin Delay (Speed Grade) | 20 ns | — |
| Supply Voltage (VCC) | 5.0 V | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | Yes (5V ISP via JTAG IEEE 1149.1) |
| Programming Technology | EEPROM (non-volatile) | — |
| 패키지 | 280-pin PGA (PIN/PEG, square) | FineLine BGA-280 (GM) |
| Terminal Form | PIN/PEG (through-hole PGA) | — |
| Package Code | PGA | — |
| Temperature Grade | Industrial | — |
| I/O Pin DC Input Range | -0.5 V to VCC + 0.5 V | — |
| Dedicated-Input Pin DC Input Range | -0.3 V to VCC + 0.3 V | — |
| I/O Transient Envelope (no-load, <20 ns) | -2.0 V undershoot to 7.0 V overshoot | — |
| VCC Ramp Requirement | Monotonic rise | — |
| Development Tool | Altera MAX+PLUS II | — |
| Supported HDLs | VHDL, Verilog HDL, AHDL | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status for GI PGA package] | ROHS3 Compliant |
| Family | — | MAX 9000 |
| Device Type | — | EE PLD (EEPROM-based) |
| User I/O | — | 216 |
| Supply Voltage (Nominal) | — | 5.0 V |
| Supply Voltage (Max) | — | 5.5 V |
| I/O Logic Level Support | — | 3.3 V or 5 V |
| Pin-to-Pin Delay (tPD) | — | 15 ns (speed grade -15) |
| Process Technology | — | CMOS EEPROM |
| 동작 온도 | — | -40C to +85C (industrial) |
| MSL 레벨 | — | 3 (168 Hours) |