EPM9560RC240-20 vs EPM9560RC240-1O 비교

다음의 상세 나란히 비교: EPM9560RC240-20 제조: Intel 및 EPM9560RC240-1O 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM9560RC240-20 EPM9560RC240-1O
브랜드 Intel Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete 최종 구매
재고 상태 In Stock In Stock
단가 (USD) $122.00 $51.07
Family MAX 9000 MAX 9000
Series MAX 9000 PLD Family —
Programmable Type In System Programmable —
Number of Macrocells 560 —
Number of Gates 12,000 —
Number of Logic Elements/Blocks 35 LABs —
Number of User I/Os 191 —
Propagation Delay (tPD max) 20 ns —
Maximum Internal Frequency 100 MHz —
Supply Voltage (VCCINT) 4.75 V to 5.25 V —
Technology CMOS, EEPROM-based —
동작 온도 0C to 70C (Commercial) —
실장 유형 Surface Mount Surface Mount
패키지 / 케이스 240-BFQFP Exposed Pad (RQFP-240) —
Supplier Device Package 240-RQFP —
Programming Interface JTAG (IEEE 1149.1), Altera proprietary —
Product Status Obsolete —
Lead-Free / RoHS [DATA_NEEDED: RoHS status for this lot] —
Usable Gates — 12,000
Macrocells — 560
Logic Array Blocks (LABs) — 35
Maximum User I/O Pins — 216
Propagation Delay (tPD) — 12 ns (typ, -1 speed grade)
Global Setup Time (tFSU) — 3.0 ns
Clock-to-Output (tFCO) — 4.8 ns
Maximum Internal Frequency (fCNT) — 145 MHz
Supply Voltage (VCC) — 5.0 V
Operating Temperature (Grade) — -40C to +85C (industrial, "-1O" suffix)
Process Technology — CMOS EEPROM, 0.65 um
Programming — In-system programmable via IEEE 1149.1 JTAG
Architecture — Multiple Array MatriX (MAX), third generation
패키지 — RQFP-240 (240-pin Reduced-height QFP)
RoHS 상태 — Compliant (per Altera/Intel product page)
Lead-Free — Yes

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