EPM9560RC304-15F vs EPM9560RC304-15N 비교
다음의 상세 나란히 비교: EPM9560RC304-15F 제조: Altera 및 EPM9560RC304-15N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM9560RC304-15F - 560-Macrocell MAX 9000 CPLD, 5V, RQFP-304 | Intel
EPM9560RC304-15F Obsolete사양 비교
| 파라미터 | EPM9560RC304-15F | EPM9560RC304-15N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $18.75 | $19.80 |
| Device Family | MAX 9000 | — |
| Series | EPM9560 | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Propagation Delay (tpd) | 16.6 ns (max) | — |
| Maximum Internal Frequency | 117.6 MHz | — |
| Core Supply Voltage | 5.0 V | — |
| User I/O Pins | 212 | — |
| Dedicated Inputs | 4 | — |
| Logic Array Blocks (LABs) | 16 (40 macrocells each) | 16 (estimated from 560 macrocells) |
| 패키지 | RQFP-304 (304-pin Plastic QFP) | RQFP-304 |
| Programming Technology | 5.0 V in-system EEPROM via JTAG (IEEE 1149.1) | — |
| Architecture | Multiple Array MatriX (MAX) with PIA interconnect | Multiple Array MatriX (MAX) - 3rd generation |
| Boundary Scan Test (BST) | Yes, JTAG-compliant | — |
| 동작 온도 | -40C to +85C (industrial) | — |
| Process Technology | High-performance CMOS, EEPROM-based | High-performance CMOS EEPROM |
| 실장 유형 | Surface Mount | — |
| MSL 레벨 | 3 (168 hours) | — |
| RoHS 상태 | [DATA_NEEDED: rohs status - not stated in source] | Compliant (lead-free per suffix N marking) |
| Family | — | MAX 9000 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum Operating Frequency (fMAX) | — | 117.6 MHz |
| Pin-to-Pin Propagation Delay | — | 15 ns (-15 speed grade) |
| Supply Voltage (VCCINT) | — | 5 V |
| User I/O Count | — | 304 (package-level) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Operating Temperature Grade | — | Commercial (suffix N) |