K3K9K90BM-MGCP vs K3LKCKC0BM-MGCP 비교
다음의 상세 나란히 비교: K3K9K90BM-MGCP 제조: Samsung Electronics 및 K3LKCKC0BM-MGCP 제조: Samsung Electronics. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | K3K9K90BM-MGCP | K3LKCKC0BM-MGCP |
|---|---|---|
| 브랜드 | Samsung Electronics | Samsung Electronics |
| 카테고리 | Memory ICs | DRAM |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $47.15 | $65.63 |
| 메모리 유형 | LPDDR5 SDRAM (CMOS) | LPDDR5 SDRAM |
| 메모리 구성 | [DATA_NEEDED: density and organization] | 2G x32 |
| Pin Speed | Up to 6400 Mbps (family maximum per Samsung LPDDR5 page) | — |
| Interface Width | x32 (family standard for K3K/K3L BM packages) | — |
| 패키지 | PBGA (Plastic Ball Grid Array) | FBGA-315 (PBGA) |
| Ball Count | [DATA_NEEDED: ball count] | — |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | -25C to +85C |
| Supply Voltage (VDD) | [DATA_NEEDED: VDD voltage] | — |
| Refresh | Self-refresh with per-bank refresh support (LPDDR5 standard) | — |
| Power Saving vs LPDDR4X | Approximately 20% (Samsung published figure) | — |
| Max Bandwidth | Up to 51.2 GB/s (family maximum per Samsung LPDDR5 page) | — |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | Compliant |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Clocking | WCK (word clock) architecture | — |
| Standards | JEDEC LPDDR5 | — |
| Density | — | 64 Gbit (8 GB) |
| 데이터 속도 | — | 6400 Mbps |
| 인터페이스 | — | CMOS, LPDDR5 |
| Supply Voltage (VDD1) | — | 1.05 V |
| Supply Voltage (VDD2/other rails) | — | 1.8 V, 900 mV, 500 mV |
| Technology | — | CMOS DRAM |
| Product Family | — | Samsung LPDDR5 |
| Bandwidth (per Samsung LPDDR5 family) | — | 51.2 GB/s (family-level, 6400 Mbps pin speed) |
| Power Saving (family feature) | — | Up to 20% power saving vs previous generation (Samsung LPDDR5 family) |
| Unit Price | — | USD 57.7195 (LCSC, as of 2026-09-04) |