MC9S12C96CFAE557 vs S9S12G96F0MLH 비교
다음의 상세 나란히 비교: MC9S12C96CFAE557 제조: NXP Semiconductors 및 S9S12G96F0MLH 제조: NXP Semiconductors. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
NXP Semiconductors
MC9S12C96CFAE557 - 16-Bit 96KB Flash HCS12 MCU 48-LQFP | NXP
MC9S12C96CFAE557 ✓ 활성
사양 비교
| 파라미터 | MC9S12C96CFAE557 | S9S12G96F0MLH |
|---|---|---|
| 브랜드 | NXP Semiconductors | NXP Semiconductors |
| 카테고리 | Microcontrollers | Microcontrollers |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $4.95 | $7.95 |
| Core | HCS12 (CPU12) | HCS12 / CPU12 (16-bit CISC) |
| 데이터 버스 폭 | 16-bit | — |
| Program Memory Size | 96 KB (Flash) | — |
| RAM Size | 4 KB | — |
| EEPROM Size | 1 KB | — |
| 최대 클록 주파수 | 25 MHz | — |
| Supply Voltage Range | 2.97 V to 5.5 V | — |
| 동작 온도 범위 | -40C to +125C (automotive AEC-Q100 grade) | — |
| 패키지 | 48-LQFP (7x7 mm, 0.5 mm pitch) | 64-LQFP (10 x 10 mm, 0.5 mm pitch) |
| Number of I/O Pins | 31 | — |
| ADC | 10-bit, up to 8 channels | 8/10-bit successive approximation ADC |
| PWM Channels | Up to 6 channels | — |
| Communication Interfaces | 1x CAN 2.0 A/B, 2x SCI (UART), 1x SPI, 1x I2C | — |
| On-chip Voltage Regulator | Yes (bandgap, generates internal 2.5 V) | — |
| PLL | Yes | — |
| Debug Interface | BDM (Background Debug Mode) | BDM (Background Debug Mode) |
| 실장 유형 | Surface Mount | Surface Mount (Gull-Wing leads) |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | Compliant |
| Family | — | S12G |
| Program Flash | — | 96 KB (96K x 8) |
| RAM | — | [DATA_NEEDED: exact SRAM size in KB] |
| EEPROM | — | [DATA_NEEDED: EEPROM size in bytes] |
| Maximum CPU Frequency | — | 25 MHz |
| Supply Voltage (VDDx) | — | 3.13 V to 5.5 V (single 3.3V or 5V supply) |
| 동작 온도 | — | -40 C to +125 C (automotive grade) |
| AEC-Q100 | — | Qualified (automotive) |
| Communication Controllers | — | 1x msCAN 2.0A/B, 1x SCI (LIN-capable) |
| Timers / PWM | — | PWM-6 (6-channel 8-bit PWM) |
| GPIO Count | — | [DATA_NEEDED: total GPIO count] |
| Internal Voltage Regulator | — | Yes (VREG-controlled core logic) |
| MSL 레벨 | — | MSL3 (per JEDEC J-STD-020) |
| Lead-Free | — | Yes |