MT25QU256ABA1EW7-0SIT vs MT25QU256ABA1EW7-0SIT-TR 비교
다음의 상세 나란히 비교: MT25QU256ABA1EW7-0SIT 제조: Micron Technology 및 MT25QU256ABA1EW7-0SIT-TR 제조: Micron Technology. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Micron Technology
MT25QU256ABA1EW7-0SIT - 256Mb 1.8V Quad SPI NOR Flash | Micron
MT25QU256ABA1EW7-0SIT ✓ 활성Micron Technology
MT25QU256ABA1EW7-0SIT-TR - 256Mb 1.8V Quad SPI NOR Flash | Micron
MT25QU256ABA1EW7-0SIT-TR ✓ 활성사양 비교
| 파라미터 | MT25QU256ABA1EW7-0SIT | MT25QU256ABA1EW7-0SIT-TR |
|---|---|---|
| 브랜드 | Micron Technology | Micron Technology |
| 카테고리 | Memory ICs | Memory ICs |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $2.05 | $1.78 |
| 메모리 유형 | Non-Volatile NOR Flash | NOR Flash, Serial (SPI) |
| Memory Format | Serial NOR Flash | — |
| Technology | SLC NOR (Single-Level Cell) | — |
| Density | 256 Mbit (32 MB) | 256 Mbit (32 MB) |
| Memory Organization | 64M x 4 / 32M x 8 / 16M x 16 | 256M x 1 / 128M x 2 / 64M x 4 bit |
| 인터페이스 | SPI, Dual SPI, Quad SPI, Octal/DTR SPI | — |
| Clock Frequency (Quad I/O) | 133 MHz | — |
| Access Time | 6 ns | — |
| Supply Voltage (VCC) | 1.7 V to 2.0 V (1.8 V nominal) | 1.7 V to 2.0 V |
| 동작 온도 | -40 °C to +85 °C | -40C to +85C (industrial) |
| 패키지 | 8-WPDFN (6x5 mm, MLP8) with Exposed Pad | 8-WPDFN 6x5 mm (MLP8) |
| 실장 유형 | Surface Mount | Surface Mount |
| Sector Size | 4 KB (subsector 32 KB, block 64 KB) | — |
| Program/Erase Endurance | 100,000 cycles per sector (typical) | — |
| Data Retention | 20 years (typical) | 20 years (typical) |
| Write Protection | Hardware WP#, Software, and Absolute Lock | Hardware WP#, software, and absolute protection |
| Security Features | 256-byte security register, OTP bits | — |
| JEDEC Standard | JESD216 SFDP | — |
| MSL 레벨 | [DATA_NEEDED: MSL moisture sensitivity level] | [DATA_NEEDED: MSL rating] |
| RoHS 상태 | Compliant | Compliant |
| 최대 클록 주파수 | — | 133 MHz |
| Interface Modes | — | Single SPI, Dual SPI, Quad SPI |
| Maximum Throughput | — | 532 Mbit/s (Quad SPI) |
| Sector Architecture | — | 4 KB parameter + 64 KB uniform sectors |
| Endurance | — | 100,000 erase/write cycles per sector |
| XIP (Execute-in-Place) | — | Supported |
| OTP Security Register | — | 256 bytes (3 x 64-byte regions, plus 64 lock bits) |
| Packaging | — | Tape and Reel (TR suffix) |
| Technology Node | — | 65 nm floating-gate NOR |