RTAX1000SL-1CGS624E vs RTAX1000SL-CGS624E 비교
다음의 상세 나란히 비교: RTAX1000SL-1CGS624E 제조: Microchip Technology 및 RTAX1000SL-CGS624E 제조: Microchip Technology. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Microchip Technology
RTAX1000SL-1CGS624E - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-1CGS624E ✓ 활성Microchip Technology
RTAX1000SL-CGS624E - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-CGS624E ✓ 활성사양 비교
| 파라미터 | RTAX1000SL-1CGS624E | RTAX1000SL-CGS624E |
|---|---|---|
| 브랜드 | Microchip Technology | Microchip Technology |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $3,420.00 | $3,970.00 |
| System Gates | 1,000,000 | — |
| ASIC Gates (embedded) | 125,000 | — |
| Configurable Logic Blocks (CLBs) | 12096 | 12096 |
| Family | RTAX-S/SL (radiation-tolerant, antifuse) | RTAX-S/SL Radiation-Tolerant FPGA |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Maximum System Performance | 581 MHz | — |
| 패키지 | CGA-624 (ceramic column grid array, 624 pins) | 624-ball Ceramic Column Grid Array (CGS624) |
| Speed Grade | -1 | — |
| 동작 온도 | -55C to +125C | [DATA_NEEDED: Operating Temperature] |
| Programming Technology | Antifuse (one-time programmable, live at power-up) | — |
| SEU Immunity | SEU-hardened registers; soft-error rate < 10-10 errors/bit-day | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| 실장 유형 | Surface Mount | Surface Mount |
| Application Domain | Space flight systems | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS Status] |
| Embedded FIFO Control | Yes | — |
| Equivalent System Gates | — | 1000000 gates |
| Additional ASIC Gates | — | 125000 gates |
| Maximum System Frequency | — | 581 MHz |
| Radiation Tolerance | — | Radiation-tolerant (space-flight qualified family) |
| Configuration | — | Non-volatile anti-fuse, live-at-power-up, single chip |
| Clocking Features | — | Segmentable clocks, chip-wide highway routing |
| Arithmetic Support | — | Dedicated carry logic |
| I/O Count | — | [DATA_NEEDED: User I/O Count] |