RTAX4000SL-LG1272V vs RTAX4000SL-1CG1272E 비교
다음의 상세 나란히 비교: RTAX4000SL-LG1272V 제조: Microchip Technology 및 RTAX4000SL-1CG1272E 제조: Microchip Technology. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Microchip Technology
RTAX4000SL-LG1272V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-LG1272V ✓ 활성Microchip Technology
RTAX4000SL-1CG1272E - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-1CG1272E ✓ 활성사양 비교
| 파라미터 | RTAX4000SL-LG1272V | RTAX4000SL-1CG1272E |
|---|---|---|
| 브랜드 | Microchip Technology | Microchip Technology |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $0.00 | $0.00 |
| Logic Cells | 60480 | 40,320 |
| CLBs | 40320 | — |
| Equivalent System Gates | 4000000 | — |
| Family | RTAX-S/SL and RTAX-DSP | RTAX-SL (Radiation-Tolerant FPGA) |
| Programming Technology | Antifuse (one-time programmable) | — |
| Radiation Tolerance | Radiation-tolerant, space-flight grade | Radiation-tolerant (SEU-hardened registers) |
| Power-Up Mode | Live at power-up (LAPU) | — |
| Form Factor | True single-chip | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Clocking | Segmentable clocks | — |
| Routing | Chip-wide highway routing, carry logic | — |
| Base Architecture | Microsemi Axcelerator commercial family | — |
| 패키지 | 1272-pin ceramic LG (CGA) package | — |
| 실장 유형 | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | — |
| RoHS 상태 | [DATA_NEEDED: RoHS Status] | — |
| 동작 온도 | [DATA_NEEDED: Operating Temperature] | -55C to +125C |
| Core Voltage | [DATA_NEEDED: Core Voltage] | 1.5 V |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O] | — |
| Embedded SRAM Bits | [DATA_NEEDED: Embedded SRAM Bits] | — |
| System Gates | — | 4,000,000 |
| Logic Elements / CLBs | — | 40,320 |
| Process Technology | — | 0.15 um CMOS |
| Package Type | — | CCGA-1272 (Ceramic Column Grid Array) |
| 핀 수 | — | 1272 |
| Number of I/Os | — | 840 |
| Minimum Operating Temperature | — | -55 C |
| Package Width | — | 37.5 mm |
| Logic Family | — | CMOS |
| SEU Immunity | — | SEU rate < 10^-10 errors/bit-day (per family datasheet) |
| Programming | — | One-time programmable at manufacturing (single-chip, live-at-power-up) |