XC2C32A-6CPG56I vs XC2C32A-6CP56C 비교

다음의 상세 나란히 비교: XC2C32A-6CPG56I 제조: AMD 및 XC2C32A-6CP56C 제조: Xilinx. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

Xilinx
XC2C32A-6CP56C XC2C32A-6CP56C - 32-Macrocell 200MHz CPLD | Xilinx

XC2C32A-6CP56C - 32-Macrocell 200MHz CPLD | Xilinx

XC2C32A-6CP56C ✓ 활성

사양 비교

파라미터 XC2C32A-6CPG56I XC2C32A-6CP56C
브랜드 AMD Xilinx
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 활성 활성
Device Type CoolRunner-II complex programmable logic device (CPLD) CoolRunner-II complex programmable logic device (CPLD)
Architecture 0.18 µm CMOS —
Number of Macrocells 32 macrocells —
Number of User I/Os 33 user I/Os —
Equivalent Logic Gates 750 gates —
Maximum Internal Frequency 450 MHz —
Family Operating Frequency 200 MHz —
Pin-to-Pin Logic Delay 3.0 ns —
Alternative Pin-to-Pin Logic Delay 3.8 ns —
대기 전류 12 µA minimum 12 µA
Programming Type In-system programmable —
공급 전압 1.8 V optimized —
패키지 56-pin CSBGA, 6 mm × 6 mm, 0.50 mm pitch CSP-56, 6 x 6 mm, 0.50 mm pitch
Package Pin Count 56 pins —
Logic Family CMOS CMOS
Lead-Free Status Lead free —
RoHS 상태 RoHS compliant [DATA_NEEDED: RoHS status]
동작 온도 범위 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Recommended Power Supply Voltage [DATA_NEEDED: recommended power supply voltage] —
I/O Voltage Range [DATA_NEEDED: I/O voltage range] —
Maximum DC Input Current per I/O [DATA_NEEDED: maximum DC input current per I/O] —
Macrocell Count — 32 macrocells
Logic Gate Count — 750 gates
User I/O Count — 33 pins
Logic Array Blocks — 2 logic array blocks
Maximum Operating Frequency — 200 MHz
Internal Frequency — 450 MHz
Propagation Delay — 4 ns
Minimum Pin-to-Pin Logic Delay — 3.0 ns
Core Supply Voltage — 1.8 V
Internal Supply Voltage Range — 1.7 V to 1.9 V
Process Technology — 0.18 µm CMOS
Total Package Pins — 56 balls
실장 유형 — Surface mount
Programming Support — In-system programmable
REACH Status — [DATA_NEEDED: REACH status]

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