XC3090L-7TQG176C vs XC3090L-6TQG176C 비교
다음의 상세 나란히 비교: XC3090L-7TQG176C 제조: Xilinx 및 XC3090L-6TQG176C 제조: Xilinx. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | XC3090L-7TQG176C | XC3090L-6TQG176C |
|---|---|---|
| 브랜드 | Xilinx | Xilinx |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $21.20 | $63.00 |
| Family | XC3000L | XC3000L Low-Voltage Logic Cell Array |
| Device | XC3090L | XC3090L |
| Logic Cells / CLBs | 100 CLBs (320 F-FFs) | — |
| Usable Gates | 5,000 (typical, up to 9,000 peak) | — |
| User I/O Count | 144 (maximum, TQG176) | 138 |
| Configuration Memory | SRAM (volatile, requires external PROM) | SRAM (volatile, in-system programmable) |
| Process Technology | 0.8 micron CMOS | — |
| Supply Voltage (Core) | 3.0 V to 3.6 V | — |
| Supply Voltage (I/O VCCO) | 3.0 V to 3.6 V | — |
| Logic Cell Toggle Delay | approximately 1.3 to 1.5 ns (-7 speed grade) | — |
| 동작 온도 범위 | 0C to +85C (C suffix, commercial) | — |
| 패키지 | 176-pin TQFP (TQG176), 1.4 mm height, surface-mount | TQG176 (Thin Quad Gull-Wing, 176 pins) |
| 실장 유형 | Surface Mount | Surface Mount |
| Configuration Mode | Serial (master/slave) and JTAG (IEEE 1149.1) | — |
| MSL 레벨 | 3 (168 hours) [DATA_NEEDED: confirm per package marking] | — |
| RoHS 상태 | unknown | unknown (legacy family, pre-dates RoHS documentation conventions) |
| Lead-Free / Lead Content | [DATA_NEEDED] | — |
| Configuration Clock Source | Internal oscillator amplifier or external pin | — |
| Output Drive (per I/O) | 8 mA source / 24 mA sink (typical, datasheet TBD by speed grade) | — |
| Series | — | XC3000L |
| Speed Grade | — | -6 (6 ns tpd) |
| 공급 전압 | — | 3.3 V |
| Combinatorial Logic Delay (tpd) | — | 6 ns |
| 동작 온도 | — | Commercial (0C to +70C) |
| Family Differentiator | — | Low-voltage 3.3V core vs 5.0V XC3000A |
| Compatible Programming Tools | — | Xilinx XChecker, JTAG boundary-scan, PROM-based serial configuration |
| Lead Free | — | unknown |
| Pinout Type | — | Perimeter I/O ring with user I/O and dedicated configuration pins |