XC6SLX45-2FGG484I vs XC6SLX45-2FGG676I 비교
다음의 상세 나란히 비교: XC6SLX45-2FGG484I 제조: AMD 및 XC6SLX45-2FGG676I 제조: AMD. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | XC6SLX45-2FGG484I | XC6SLX45-2FGG676I |
|---|---|---|
| 브랜드 | AMD | AMD |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $65.10 | $55.80 |
| Family | Spartan-6 LX | Spartan-6 LX |
| Logic Cells | 43,661 | 43,661 |
| Logic Slices | 6,822 | — |
| Flip-Flops | 54,576 | — |
| Block RAM | 2,138,112 bits (2,088 Kb/s) | 2,088 Kbit |
| DSP Slices (DSP48A1) | 58 | — |
| Maximum User I/O | 316 | — |
| 패키지 | 484-ball BGA (FBGA-484) | 676-ball FBGA (FGG676), 27 x 27 mm, 1.0 mm pitch |
| Package Dimensions | 23 x 23 mm, 1.0 mm ball pitch | — |
| Speed Grade | -2 | -2 |
| Operating Temperature (I grade) | -40C to +100C (industrial) | — |
| Process Technology | 45 nm low-power CMOS | 45 nm CMOS |
| Supply Voltage Core | 1.2 V typical | — |
| Clock Management Tiles | 6 CMT (4 DCM + 2 PLL) | — |
| Maximum I/O Speed | 800 Mbps LVDS | — |
| Memory Interface Support | DDR, DDR2, DDR3, LPDDR | — |
| Configuration Memory | AES-256 bitstream encryption | — |
| RoHS Compliance | Lead-free / RoHS compliant | — |
| Part Number | — | XC6SLX45-2FGG676I |
| Configurable Logic Blocks (CLBs) | — | 3,411 |
| Total Flip-Flops | — | 54,576 |
| DSP48A1 Slices | — | 58 |
| User I/Os | — | 358 |
| Number of I/O Banks | — | 4 |
| Core Voltage | — | 1.2 V |
| Internal Frequency | — | 500 MHz |
| Operating Temperature (Industrial) | — | -40 °C to +100 °C |
| Compliance | — | RoHS compliant, Lead Free |