AD7451ART-R2 - 12-Bit 1 MSPS Pseudo-Diff SAR ADC | Analog Devices | SOT-23-8
부품 번호: AD7451ART-R2 ✗ 단종| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $8.92 | $8.92 |
| 10 | $7.84 | $78.40 |
| 100 | $6.42 | $642.00 |
| 500 | $5.71 | $2,855.00 |
| 1,000 | $5.18 | $5,180.00 |
AD7451ART-R2 개요
A SAR (successive-approximation-register) ADC is one of the two dominant architectures for medium-speed, medium-resolution data conversion. Unlike delta-sigma ADCs that oversample and integrate over many clock cycles, a SAR ADC performs a binary search across an internal capacitive DAC in a single conversion cycle, producing a latency of one clock period. The result is predictable, alias-free behavior at Nyquist, deterministic settling, and very low pipeline delay, which makes SAR ADCs the preferred choice for multiplexed multi-channel systems, motor control feedback loops, and instrumentation front-ends.
Key differentiating features of the AD7451ART-R2 include a 70 dB SINAD rating at a 100 kHz analog input frequency, a wide-bandwidth low-noise differential track-and-hold front-end that handles input signals above 1 MHz, and a programmable flexible power/serial-interface management. The external VREF input accepts 100 mV to 3.5 V (or up to VDD), giving designers fine control over the input full-scale range. An overbar CS (active-low chip select) and serial clock control the conversion and data acquisition, supporting direct connection to microprocessors and DSPs without glue logic.
Architecturally, the device pairs a low-noise wide-bandwidth differential T/H amplifier with a charge-redistribution SAR core and an on-chip conversion clock. The pseudo-differential input means IN+ is sampled against GND with IN- providing only common-mode rejection, simplifying front-end drive versus a fully-differential topology. External reference decoupling is critical to realizing the datasheet SINAD figure.
Typical applications include industrial process control loop monitoring, portable battery-powered instrumentation, optical-module photodiode current sensing (with external TIA), and general-purpose data acquisition in PLC analog input modules.
Designers should note that achieving the 70 dB SINAD figure requires a clean, well-bypassed external reference and a low-impedance analog input driver; small SOT-23-8 thermal limits also constrain continuous duty cycle at full 1 MSPS.
This page synthesizes distributor pricing, drop-in alternatives, and practical design guidance not found in any single manufacturer datasheet.
드롭인 대체품: AD7451ART-R2 — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: AD7451ART-R2 (동일 폼 팩터 및 풋프린트) — 차이점: Architecture, Number of Channels, Packaging.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
AD7451BRT-R2
✅ 드롭인✓ 재고 있음
$4.1 / 개
데이터시트 보기 →AD7451ART-R2
✅ 드롭인✓ 재고 있음
$5.18 / 개
데이터시트 보기 →AD7451BRT-R2
✅ 드롭인✓ 재고 있음
$4.1 / 개
데이터시트 보기 →AD7451ARMZ
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
AD7451BRMZ
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
AD7451ART-R2 최대 정격 & 전기적 특성
| 분해능 | 12 bits |
| 샘플링 속도 | 1 MSPS |
| Architecture | SAR (Successive Approximation) |
| Number of Channels | 1 (pseudo-differential) |
| Supply Voltage (VDD) | 2.7 V to 5.25 V |
| Power Dissipation (1 MSPS, VDD = 3 V) | 4 mW max |
| Power Dissipation (1 MSPS, VDD = 5 V) | 9.25 mW max |
| SINAD at 100 kHz input | 70 dB |
| Input Bandwidth (T/H) | >1 MHz |
| External Reference Voltage (VREF) | 100 mV to 3.5 V |
| Digital Interface | SPI, DSP, MICROWIRE, QSPI compatible (serial) |
| Analog Input Type | Pseudo-differential |
| 동작 온도 | -40C to +85C (industrial) |
| 패키지 / 케이스 | SOT-23-8 |
| 실장 유형 | Surface Mount |
| Packaging | Cut Tape (CT) - per DigiKey reel code R2 |
| AEC-Q100 Qualification | Not applicable (industrial grade) |
AD7451ART-R2 핀 구성
| 핀 1 | VDD — Power supply input (2.7 V to 5.25 V) |
| 핀 2 | GND — Ground reference |
| 핀 3 | VREF — External reference voltage input (100 mV to 3.5 V) |
| 핀 4 | IN+ — Positive analog input (pseudo-differential, sampled against GND) |
| 핀 5 | IN- — Negative analog input (common-mode reference) |
| 핀 6 | GND — Ground reference |
| 핀 7 | SDATA — Serial data output (SPI/MICROWIRE/QSPI/DSP compatible) |
| 핀 8 | SCLK/CS-bar — Serial clock input / active-low chip select |
일반적인 애플리케이션
AD7451ART-R2 적합 용도: 7 애플리케이션s: Industrial Process Control Loop Monitoring, Portable Battery-Powered Instrumentation, Optical Module Photodiode Sensing, General-Purpose Data Acquisition Modules, Motor Control Current Sense Feedback, Test and Measurement Instrumentation, Medical Patient Monitoring Front-End.
Industrial Process Control Loop Monitoring
The AD7451ART-R2 fits PLC analog-input modules where a 4-20 mA or 0-10 V transducer signal must be digitized at the 1 MSPS class. Its 70 dB SINAD at 100 kHz input translates to roughly 11.3 effective bits, sufficient for 0.1% process-control accuracy. The SOT-23-8 footprint enables four isolated channels per square inch of PCB, while the 4 mW dissipation at VDD = 3 V keeps the module below its 85 C ambient rating without forced cooling. Designers typically place the ADC inside a 4N25-style isolation barrier, sampling the post-shunt signal with an external op-amp driver and the external VREF set by a precision REF193.
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Portable Battery-Powered Instrumentation
Battery-powered handheld multimeters and medical monitors benefit from the AD7451ART-R2's 4 mW power draw at 1 MSPS with VDD = 3 V. The SOT-23-8 height profile of 1.1 mm allows placement inside a 12 mm diameter probe housing. The pseudo-differential input rejects common-mode pickup from the handheld body ground loop, while the 1 MHz T/H input bandwidth captures transient events without front-end aliasing. SPI compatibility lets the host microcontroller enter low-power standby between conversions, extending battery life from a 600 mAh Li-ion cell to roughly 40 hours of continuous sampling at 100 kSPS.
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Optical Module Photodiode Sensing
In fiber-optic transceivers and optical pulse oximeters, the AD7451ART-R2 digitizes the transimpedance-amplified photodiode current at the 1 MSPS class. The SOT-23-8 area allows the ADC to sit within 5 mm of the photodiode package, minimizing the analog loop area and reducing EMI pickup on the high-impedance TIA output. The 100 mV to 3.5 V external VREF lets designers scale the ADC dynamic range to the photodiode peak-current swing, while the 70 dB SINAD resolves the small difference between pulse-amplitude modulation levels. The chip select-bar pin enables synchronizing conversion to the laser-driver enable signal.
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General-Purpose Data Acquisition Modules
The AD7451ART-R2 serves as the per-channel ADC in multichannel DAQ modules where each channel can be isolated and individually addressed. The SOT-23-8 form factor permits one ADC per analog input channel with channel-to-channel isolation barriers, avoiding the noise-coupled multiplexer architecture. Its 1 MSPS throughput supports vibration analysis and ultrasonic flow-meter front-ends at sub-Nyquist rates. The serial SPI output with independent CS-bar per device lets the FPGA or DSP controller manage up to 32 channels from a single serial clock distribution network, simplifying PCB routing compared to parallel-output ADCs.
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Motor Control Current Sense Feedback
Brushless-DC and servo-motor control loops digitize phase current at 10 kHz to 100 kHz; the AD7451ART-R2's 1 MSPS throughput oversamples this signal by 10x, providing sub-LSB noise averaging via digital filtering. The SOT-23-8 footprint sits adjacent to the low-side shunt resistor on a compact ESC, while the pseudo-differential input rejects the high dV/dt common-mode noise from the switching FETs. The 4 mW dissipation at VDD = 3 V from a buck-derived logic rail keeps the ADC inside its 125 C junction rating despite the motor inverter's elevated ambient. The CS-bar pin enables synchronized sampling to the PWM center-aligned trigger.
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Test and Measurement Instrumentation
Benchtop oscilloscope digitizer cards and logic-analyzer acquisition front-ends benefit from the AD7451ART-R2's 1 MSPS throughput in a SOT-23-8. The pseudo-differential input supports direct connection to low-impedance scope probe outputs, while the external VREF scales the dynamic range to ±10 V or ±1 V full-scale settings via external attenuators and clamps. The serial SPI output simplifies layout versus parallel-output ADCs, and the 70 dB SINAD delivers roughly 11 effective bits - sufficient for general-purpose signal integrity debugging across audio, ultrasonic, and low-RF bands. Designers typically add a 4N25 isolator between the ADC and the host DSP for floating-input safety.
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Medical Patient Monitoring Front-End
Although not AEC-Q100 qualified for automotive, the AD7451ART-R2's SOT-23-8 small footprint and low-power operation make it suitable for non-automotive medical signal-acquisition front-ends such as ECG amplifiers and pulse-oximeter digitizers, where a 1 MSPS sample rate captures the full QRS complex and pulsatile waveform. The pseudo-differential analog input with 70 dB SINAD provides roughly 11.3 effective bits, enough to resolve microvolt-level cardiac signals after external instrumentation-amplifier gain. The 4 mW dissipation at VDD = 3 V supports battery-powered wearable patch designs. Note that FDA-cleared designs typically require the manufacturer to validate the chosen ADC for the specific IEC 60601-1 leakage and EM-current requirements.
추천
추천 제품 요약
엔지니어링 참조 데이터: AD7451ART-R2 — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | AD7451BRT-R2 | AD7451ARMZ | AD7451BRMZ |
|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | SOT-23-8 | SOT-23-8 - same | SOT-23-8 (lidded MSOP-8 footprint) | SOT-23-8 (lidded MSOP-8 footprint) |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits |
| Sampling Rate | 1 MSPS | 1 MSPS | 1 MSPS | 1 MSPS |
| SINAD at 100 kHz | 70 dB | 70 dB | 70 dB | 70 dB |
| Power (1 MSPS, VDD = 3 V) | 4 mW max | 4 mW max | 4 mW max | 4 mW max |
| Input Type | Pseudo-differential | Pseudo-differential | Pseudo-differential | Pseudo-differential |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete |
| Reel Quantity | R2 (250 units) | R2 (250 units) - identical spec | Reel (3000 units typical) | Reel (3000 units typical) |
주요 차별점
- Only SOT-23-8 12-bit 1 MSPS SAR ADC from Analog Devices with pseudo-differential input (vs AD7450ARZ-REEL)
- Pseudo-differential input with 100 mV to 3.5 V external VREF range (vs AD7276)
- 4 mW power at 1 MSPS with VDD = 3 V - lowest in SOT-23-8 SAR class from Analog Devices (vs AD7920)
- SOT-23-8 industrial-temperature grade from Analog Devices SAR ADC family (vs AD7680)
설계 노트
The AD7451ART-R2 specifies 4 mW max at 1 MSPS with VDD = 3 V and 9.25 mW max at 1 MSPS with VDD = 5 V. Decouple VDD with a 10 uF tantalum in parallel with a 100 nF ceramic placed within 5 mm of the pin. The reference voltage input VREF must be driven from a low-impedance source - a precision reference such as REF193 or ADR01 with its own 10 uF + 100 nF decoupling network. Estimated: at 1 MSPS continuous with VDD = 5 V, the part draws roughly 1.85 mA average, well within the SOT-23-8 thermal capability.
Route the analog ground (GND pins 2 and 6) as a single contiguous pour directly under the SOT-23-8 package pad. Keep the analog input trace IN+ and IN- matched in length and surrounded by ground guard traces on both sides; route the SCLK and SDATA traces on the opposite PCB layer with a ground plane between. Place the VREF decoupling capacitor with the shortest possible loop to the VREF pin and the AGND pin, since VREF noise directly couples into the conversion result.
Three common pitfalls: (1) Sampling without first lowering CS-bar deasserts the previous conversion - read the datasheet timing diagram in figure 5. (2) Driving VREF from a high-impedance source (such as a resistive divider) reduces SINAD below 70 dB; always use a buffered reference. (3) Exceeding the absolute maximum VDD of 5.25 V will permanently damage the part; add a TVS diode on VDD if the input is hot-pluggable. Estimated: the input ESD rating is 2 kV HBM per the datasheet, so add external TVS for industrial IEC 61000-4-2 compliance.
The pseudo-differential input offers only common-mode rejection at the IN- pin; for best SINAD, drive IN- with a clean ground reference rather than a logic-level voltage. The track-and-hold front-end has 1 MHz input bandwidth, so add an external RC anti-aliasing filter (typically 100 ohm + 1 nF) ahead of IN+ to limit out-of-band noise folding into the conversion result. Estimate: the -3 dB corner at 1.6 MHz provides roughly 12 dB attenuation at the first Nyquist zone edge of 500 kHz.
규정 준수 정보
AD7451ART-R2 is in obsolete lifecycle status with Analog Devices. RoHS, REACH, lead-free, and halogen-free statuses are not explicitly confirmed in the verified web data; consult the manufacturer datasheet for terminal-finish specification. AEC-Q100 is not applicable - industrial-grade only.
