AD7771BCPZ - 8-Ch 24-Bit 128kSPS Sigma-Delta ADC | Analog Devices
부품 번호: AD7771BCPZ ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $38.5 | $38.50 |
| 10 | $35.4 | $354.00 |
| 100 | $31.2 | $3,120.00 |
| 500 | $28.05 | $14,025.00 |
| 1,000 | $25.3 | $25,300.00 |
AD7771BCPZ 개요
What is a sigma-delta ADC? A sigma-delta ADC is a type of analog-to-digital converter that uses oversampling and noise-shaping to trade sample rate for resolution; it belongs to the broader category of data converters (ADC/DAC) within the integrated circuit family, and ADCs in this class are widely used when high dynamic range and integrated digital filtering are required. Sigma-delta converters sit between successive-approximation-register (SAR) ADCs (lower latency, lower speed) and high-speed pipeline ADCs (lowest resolution, highest speed) in the precision-converter hierarchy.
Key features include programmable ODRs and bandwidth, a sample-rate converter (SRC) for coherent sampling with resolution up to 15.2 x 10^-6 SPS, low-latency sinc3 and sinc5 filter paths, and adjustable bandwidth. According to the manufacturer datasheet, the AD7771 integrates a 2.5 V internal reference with a typical temperature coefficient of +/-10 ppm/degree C and includes an internal multiplexer that can sense internal nodes for diagnostics and self-calibration.
The AD7771 architecture pairs a precision analog modulator per channel with shared digital decimation and filtering resources, allowing all eight channels to be sampled simultaneously without inter-channel skew. This topology is purpose-built for power-line monitoring, multi-phase motor control, and any application requiring deterministic per-sample timing across many channels at industrial bandwidths.
Typical applications include three-phase power quality analyzers, industrial process control and PLC analog front ends, multi-axis vibration and condition-monitoring systems, and medical instrumentation requiring IEC 60601-1-class patient isolation monitoring. The integrated PGA eliminates external gain stages, simplifying the signal chain.
When designing with this device, ensure the AVSS pins are tied to a clean analog ground and that the exposed pad is soldered to a sufficiently large copper pour to meet the thermal and grounding requirements described in the datasheet. Decouple AVDD and IOVDD separately with low-ESR ceramic capacitors placed as close to the pins as practical.
This page synthesizes distributor pricing, drop-in same-package alternatives, and practical PCB/grounding notes that complement the manufacturer datasheet with field-ready selection context.
드롭인 대체품: AD7771BCPZ — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: AD7771BCPZ (동일 폼 팩터 및 풋프린트) — 차이점: Interface, Operating Temperature Range, Package, Resolution.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
AD7771BCPZ-RL
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
AD7771WCCPZ
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
AD7770BCPZ
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
AD7771BCPZ 최대 정격 & 전기적 특성
| Number of Channels | 8 |
| 분해능 | 24 bit |
| ADC Architecture | Sigma-Delta |
| Sampling Mode | Simultaneous sampling |
| Input Type | Single-ended or true differential |
| PGA Gain Options | 1, 2, 4, 8 (per channel) |
| Output Data Rate (max) | 128 kSPS per channel |
| DC Input Current, Differential | +/-4 nA |
| DC Input Current, Single-ended | +/-8 nA |
| Sampling Rate Resolution (SRC) | Up to 15.2 x 10^-6 SPS |
| Filter Paths | Low-latency sinc3 and sinc5 |
| Internal Reference Voltage | 2.5 V |
| Reference Temperature Coefficient | +/-10 ppm/degree C (typical) |
| SNR | 106 dB (typical, per datasheet typical operating conditions) |
| Supply Voltage (AVDD) | 3.0 V to 3.6 V |
| 동작 온도 범위 | -40 degree C to +125 degree C |
| 패키지 | 64-LFCSP (9 mm x 9 mm) with exposed pad |
| 실장 유형 | Surface Mount |
| Package Height | 0.73 mm |
| 인터페이스 | SPI |
| RoHS 상태 | Compliant |
AD7771BCPZ 핀 구성
| 핀 1 | AIN1A — Analog input 1 positive |
| 핀 2 | AIN1B — Analog input 1 negative |
| 핀 3 | AIN2A — Analog input 2 positive |
| 핀 4 | AIN2B — Analog input 2 negative |
| 핀 5 | AIN3A — Analog input 3 positive |
| 핀 6 | AIN3B — Analog input 3 negative |
| 핀 7 | AIN4A — Analog input 4 positive |
| 핀 8 | AIN4B — Analog input 4 negative |
| 핀 9 | AVSS1A — Analog ground 1A |
| 핀 10 | AVDD1 — Analog supply 1 |
| 핀 11 | AVSS1B — Analog ground 1B |
| 핀 12 | AIN5A — Analog input 5 positive |
| 핀 13 | AIN5B — Analog input 5 negative |
| 핀 14 | AIN6A — Analog input 6 positive |
| 핀 15 | AIN6B — Analog input 6 negative |
| 핀 16 | AIN7A — Analog input 7 positive |
| 핀 17 | AIN7B — Analog input 7 negative |
| 핀 18 | AIN8A — Analog input 8 positive |
| 핀 19 | AIN8B — Analog input 8 negative |
| 핀 20 | AVSS2A — Analog ground 2A |
| 핀 21 | AVDD2 — Analog supply 2 |
| 핀 22 | AVSS2B — Analog ground 2B |
| 핀 23 | REFIN — Reference input |
| 핀 24 | REFOUT — Reference output (2.5 V) |
| 핀 25 | AVSS3 — Analog ground 3 |
| 핀 26 | AVDD3 — Analog supply 3 |
| 핀 27 | NC — Not connected (per datasheet) |
| 핀 28 | NC — Not connected (per datasheet) |
| 핀 29 | NC — Not connected (per datasheet) |
| 핀 30 | NC — Not connected (per datasheet) |
| 핀 31 | NC — Not connected (per datasheet) |
| 핀 32 | NC — Not connected (per datasheet) |
| 핀 33 | GND — Digital ground |
| 핀 34 | IOVDD — Digital I/O supply |
| 핀 35 | DRDY — Data ready output |
| 핀 36 | CS — SPI chip select |
| 핀 37 | SCLK — SPI clock |
| 핀 38 | DIN — SPI data input |
| 핀 39 | DOUT — SPI data output |
| 핀 40 | SYNC_IN — Sync input |
| 핀 41 | SYNC_OUT — Sync output |
| 핀 42 | RESET — Reset input (active low) |
| 핀 43 | GPIO0 — General-purpose I/O 0 |
| 핀 44 | GPIO1 — General-purpose I/O 1 |
| 핀 45 | GPIO2 — General-purpose I/O 2 |
| 핀 46 | GPIO3 — General-purpose I/O 3 |
| 핀 47 | AVSS4 — Analog ground 4 |
| 핀 48 | AVDD4 — Analog supply 4 |
| 핀 49 | NC — Not connected (per datasheet) |
| 핀 50 | NC — Not connected (per datasheet) |
| 핀 51 | NC — Not connected (per datasheet) |
| 핀 52 | NC — Not connected (per datasheet) |
| 핀 53 | NC — Not connected (per datasheet) |
| 핀 54 | NC — Not connected (per datasheet) |
| 핀 55 | NC — Not connected (per datasheet) |
| 핀 56 | NC — Not connected (per datasheet) |
| 핀 57 | NC — Not connected (per datasheet) |
| 핀 58 | NC — Not connected (per datasheet) |
| 핀 59 | NC — Not connected (per datasheet) |
| 핀 60 | NC — Not connected (per datasheet) |
| 핀 61 | NC — Not connected (per datasheet) |
| 핀 62 | NC — Not connected (per datasheet) |
| 핀 63 | NC — Not connected (per datasheet) |
| 핀 64 | EP — Exposed pad (thermal/ground) |
일반적인 애플리케이션
AD7771BCPZ 적합 용도: 6 애플리케이션s: Three-Phase Power Quality Analyzer, Industrial Process Control and PLC Analog Front End, Multi-Axis Vibration and Condition Monitoring, Medical Patient Monitoring Instrumentation, Audio Analyzer and Acoustic Test Equipment, Energy Storage and Battery Management Systems.
Three-Phase Power Quality Analyzer
The AD7771BCPZ's 8 simultaneous-sampling channels make it ideal for three-phase power-quality analyzers that monitor line voltage and current across all phases plus neutral without inter-channel skew. According to the manufacturer datasheet, the 128 kSPS per channel ODR captures harmonics up to the 50th order of 50/60 Hz line frequency with margin, while the fine-resolution SRC (15.2 x 10^-6 SPS) enables coherent sampling locked to the AC line period for FFT bins that do not leak. The per-channel PGA with gains of 1/2/4/8 directly accommodates current-transformer (CT) and Rogowski-coil outputs without external gain stages, simplifying the analog front end. Placed downstream of anti-aliasing RC networks on each input, the AD7771 outperforms SAR-based power-quality front ends by eliminating sample-time phase error between channels, which is critical for accurate real/reactive/apparent power calculations.
추천
Industrial Process Control and PLC Analog Front End
The AD7771BCPZ is well-suited to industrial PLC analog input modules that aggregate multiple thermocouple, RTD, or 4-20 mA signals into a single high-precision data-acquisition block. The 8 channels of simultaneous sampling at 128 kSPS with 24-bit resolution support high update rates even after decimation, while the per-channel PGA gain of up to 8x eliminates the need for external instrumentation amplifiers on low-level sensor outputs. According to the manufacturer datasheet, the +/-4 nA typical input bias current minimizes self-heating errors on high-impedance thermocouple sources. Used as the central ADC on a 16-channel PLC card (with a downstream analog multiplexer), the AD7771BCPZ reduces BOM cost versus 8 single-channel 24-bit ADCs while preserving channel-to-channel phase alignment for closed-loop control applications.
추천
Multi-Axis Vibration and Condition Monitoring
Multi-axis vibration analysis and predictive-maintenance systems benefit from the AD7771BCPZ's 8-channel simultaneous-sampling topology and 128 kSPS per channel bandwidth. Each channel's anti-aliasing filter can be aligned to the same phase reference, allowing vibration signatures across bearings, shafts, and housings to be correlated sample-for-sample without skew-induced artifacts. The sinc3 and sinc5 low-latency filter paths reduce decision-delay for time-critical trip events, while the wideband FIR path supports frequency-domain analysis up to the full Nyquist limit. According to the manufacturer datasheet, the integrated 2.5 V reference with +/-10 ppm/degree C drift maintains gain stability over the -40 to +125 degree C industrial temperature range, critical for equipment installed in unconditioned enclosures.
추천
Medical Patient Monitoring Instrumentation
The AD7771BCPZ is appropriate for multi-channel medical patient-monitoring front ends that aggregate ECG leads, SpO2 photodiode currents, respiration, and temperature into a single precision ADC subsystem. Its 24-bit resolution and low input bias current (+/-4 nA differential) preserve the integrity of high-impedance bioelectric signals, while the integrated PGA accommodates the small-amplitude outputs of biopotential electrodes without external INA stages. According to the manufacturer datasheet, the AD7771BCPZ's low dc input current reduces electrode polarization effects, supporting longer-term ambulatory monitoring. The exposed-pad LFCSP package simplifies creepage and clearance layout for patient-isolation barriers required by IEC 60601-1. The integrated 2.5 V reference with +/-10 ppm/degree C drift ensures stable calibration over body-temperature variations.
추천
Audio Analyzer and Acoustic Test Equipment
Audio test and measurement equipment, particularly multi-microphone acoustic analyzers and loudspeaker production-line test systems, leverage the AD7771BCPZ's 8 channels of simultaneous-sampling 24-bit conversion. Per-channel gain matching and the wide dynamic range of the sigma-delta modulator allow direct digitization of microphone preamp outputs without range switching. The sinc3 and sinc5 low-latency filter paths enable phase-response measurements critical for speaker crossover characterization, while the high ODR supports sample rates beyond 192 kHz for full audio-bandwidth capture. According to the manufacturer datasheet, the AD7771BCPZ's internal reference and shared clock domain across all 8 channels guarantee tight inter-channel gain matching required for accurate multi-mic beamforming test setups.
추천
Energy Storage and Battery Management Systems
Battery management systems (BMS) for grid energy storage and electric-vehicle battery packs use the AD7771BCPZ to simultaneously monitor cell voltages, current shunts, and temperature sensors across many battery modules. The 8-channel simultaneous-sampling architecture captures all cell voltages at exactly the same instant, eliminating measurement skew that could cause SOC miscalculation in stacked cells. The per-channel PGA accommodates the wide dynamic range between cell-voltage (0-5 V) and shunt-current (microvolt-range) signals without external scaling. According to the manufacturer datasheet, the AD7771BCPZ's wide operating temperature range (-40 to +125 degree C) supports under-hood automotive and outdoor stationary battery installations where ambient temperatures swing dramatically.
추천
추천 제품 요약
엔지니어링 참조 데이터: AD7771BCPZ — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | AD7771BCPZ-RL | AD7771WCCPZ | AD7770BCPZ |
|---|---|---|---|---|
| Package | 64-LFCSP (9x9) | 64-LFCSP (9x9) - same | 64-LFCSP (9x9) - same | 64-LFCSP (9x9) - same |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Channels | 8 | 8 | 8 | 4 |
| Resolution | 24-bit | 24-bit | 24-bit | 24-bit |
| Max ODR per channel | 128 kSPS | 128 kSPS | 128 kSPS | 128 kSPS |
| Automotive Grade | No | No | Yes (AEC-Q100) | No |
| Internal Reference | 2.5 V, +/-10 ppm/degree C | 2.5 V, +/-10 ppm/degree C | 2.5 V, +/-10 ppm/degree C | 2.5 V, +/-10 ppm/degree C |
| Supply Voltage | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
| Packaging Format | Tray | Tape and Reel (13-inch) | Tray | Tray |
주요 차별점
- True 8-channel simultaneous sampling at 24-bit (vs AD7770BCPZ)
- AEC-Q100 qualified variant available (vs AD7771WCCPZ)
- Per-channel integrated PGA (vs Generic 8-channel SAR ADCs)
설계 노트
The AD7771BCPZ requires careful partitioning of analog and digital grounds. According to the manufacturer datasheet, all AVSS pins (AVSS1A, AVSS1B, AVSS2A, AVSS2B, AVSS3, AVSS4) must be tied directly to a low-impedance analog ground plane. The exposed pad (pin 64 / EP) must be soldered to the analog ground pour to provide both thermal dissipation and a low-inductance ground return. Use a star-ground topology where the AGND and DGND planes join at a single point near the ADC's AVSS pins to prevent digital return currents from corrupting the analog ground reference.
Decouple each AVDD pin (AVDD1, AVDD2, AVDD3, AVDD4) with a 10 uF X7R ceramic capacitor in parallel with a 0.1 uF NP0/C0G ceramic capacitor, placed within 2 mm of each supply pin. The IOVDD pin requires its own 10 uF + 0.1 uF pair. Power the ADC from a low-noise LDO (such as the LT3042 or similar) rather than directly from a switching converter to avoid coupling modulator clock harmonics into the analog input path. Power-supply rejection above 80 dB is achievable only with properly decoupled, low-noise supplies.
Route analog input traces as differential pairs from the connector/anti-aliasing filter to the AINxA/AINxB pins, keeping trace length matched to within 0.5 mm to preserve common-mode rejection. Keep digital SPI traces (SCLK, DIN, DOUT, CS, DRDY) physically separated from the analog input traces, ideally on the opposite side of the LFCSP package, and avoid running them parallel to analog inputs for any significant length. Place the external anti-aliasing RC network within 5 mm of the AIN pins to maximize stop-band attenuation before the input reaches the modulator sampling network.
Do not leave any NC pins floating in a way that creates an antenna: tie NC pins to AVSS or leave them unconnected exactly as specified in the datasheet pin configuration table. Failing to solder the exposed pad results in the device exceeding its thermal rating and degrades PSRR by 10-15 dB. When using the internal 2.5 V reference, place a 10 uF decoupling capacitor on REFOUT; insufficient reference decoupling shows up as 50/60 Hz line-frequency spurs in the FFT output. Finally, ensure the SPI SCLK does not exceed the maximum frequency in the chosen decimation mode - lower ODRs support slower SCLK only.
규정 준수 정보
RoHS and REACH compliance per Analog Devices product page. Standard AD7771BCPZ is not AEC-Q100 qualified - select AD7771WCCPZ for automotive. Halogen-free status not explicitly stated in verified data - marked unknown.
