CHY103D-TL - Quick Charge 3.0 USB Interface IC | Power Integrations
부품 번호: CHY103D-TL ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $0.5 | $0.50 |
| 10 | $0.45 | $4.50 |
| 100 | $0.39 | $39.00 |
| 500 | $0.34 | $170.00 |
| 1,000 | $0.3 | $300.00 |
| 3,000 | $0.26 | $780.00 |
CHY103D-TL 개요
A Quick Charge 3.0 interface IC is a secondary-side controller that decodes the QC3.0 handshake (Class A and Class B) issued by a USB Type-A or Type-C compatible phone, tablet, or other portable device, then signals the primary-side switcher to raise or lower the charger output voltage in fine 200 mV steps above 5 V. Within the power management hierarchy it sits between the AC-DC controller (InnoSwitch, TinySwitch, TOPSwitch, or other secondary-controlled converters) and the USB output connector, functioning as a protocol translator plus a system-level fault gatekeeper.
Key specifications include support for both QC3.0 Class A (5 V/9 V/12 V up to 20 V) and Class B (up to 20 V) voltage requests, programmable continuous output voltage adjustment, integrated protection against output over-voltage, secondary-side over-temperature, and plug-out / unplug fault conditions, plus a wide 3.6 V to 20 V supply range with operating temperature from -40 °C to +150 °C junction.
The CHY103D-TL communicates with the powered device using the QC3.0 D+/D- signalling pair and dynamically adjusts the feedback reference seen by the primary-side controller, so a single secondary-side IC adds fast-charging compliance to legacy and newly designed adapters without modifying the magnetics or primary controller. It is designed to pair with Power Integrations' secondary-controlled switcher family for a minimal BOM and a single-loop feedback architecture.
Typical applications include USB Type-A and Type-C wall adapters and travel chargers that need QC3.0 fast-charging compliance, automotive USB charging ports, multi-port hubs and power banks supporting adaptive voltage, and replacement of QC2.0-only interfaces to add finer voltage granularity.
When designing with the CHY103D-TL, keep the device within its 3.6 V-20 V supply window and follow Power Integrations' reference layout to maintain signal integrity on the D+/D- lines. Avoid continuous output voltages below 3.6 V; the part is not intended for 5 V-only fixed-output designs where a QC interface adds unnecessary cost.
This page synthesizes distributor inventory, verified drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
드롭인 대체품: CHY103D-TL — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
CHY103D
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
CHY100
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
CHY103D-TL 사양
| Part Number | CHY103D-TL |
| Manufacturer | Power Integrations |
| 기능 | USB Mobile Device Charger Interface IC, Qualcomm Quick Charge 3.0 protocol |
| Protocol Support | Quick Charge 3.0, Class A and Class B |
| Backwards Compatibility | QC2.0 / BC1.2 (per device family datasheet) |
| Supply Voltage Range (VCC) | 3.6 V to 20 V |
| Output Voltage Adjustment Range | 3.6 V to 20 V (Class B), up to 12 V typical Class A |
| Voltage Adjustment Step | 200 mV (QC3.0 characteristic, not stated in provided snippets) |
| 동작 온도 | -40 °C to +150 °C |
| Protected Faults | Output over-voltage, secondary over-temperature, unplug/plug-out detection |
| Interface Lines | USB D+ and D- |
| 패키지 | 8-pin SOIC (SO-8), surface mount |
| Tape & Reel Suffix | -TL (Tape & Reel) |
| RoHS 상태 | Compliant (per JLCPCB listing) |
| Compatible Primary Controllers | InnoSwitch, TinySwitch, TOPSwitch, and other secondary-controlled switchers |
CHY103D-TL 핀 구성
| 핀 1 | VCC — Supply voltage input, 3.6 V to 20 V |
| 핀 2 | GND — Ground |
| 핀 3 | DP — USB D+ data line for QC3.0 handshake |
| 핀 4 | DM — USB D- data line for QC3.0 handshake |
| 핀 5 | FB — Feedback output to primary-side controller for voltage adjustment |
| 핀 6 | SHTDN#/STATUS — Shutdown or status output, function per datasheet |
| 핀 7 | NC — Not connected (per datasheet) |
| 핀 8 | NC — Not connected (per datasheet) |
일반적인 애플리케이션
CHY103D-TL 적합 용도: 6 애플리케이션s: USB Type-A QC3.0 Wall Charger, USB Type-C PD + QC3.0 Dual-Protocol Charger, Automotive USB Charging Port, Multi-Port USB Power Hub, QC3.0 Mobile Power Bank, Travel Adapter (Multi-Region Fast Charger).
USB Type-A QC3.0 Wall Charger
The CHY103D-TL is the secondary-side protocol IC in a USB Type-A 18 W to 60 W wall charger, decoding QC3.0 requests from the phone and signalling the primary switcher. Its 3.6 V to 20 V supply range covers all Class A and Class B voltage steps, and its built-in over-voltage, over-temperature, and unplug-fault protection replace three discrete comparator circuits used in older QC2.0 designs. Placed on the secondary side between the rectifier output and the USB receptacle D+/D- pins, the CHY103D-TL drives a feedback node into an InnoSwitch3 or TOPSwitch-JX primary controller, achieving 85%+ average efficiency with no optocoupler pair mismatch compensation.
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USB Type-C PD + QC3.0 Dual-Protocol Charger
In a USB Type-C charger that must accept both USB-PD and Qualcomm QC3.0 handsets, the CHY103D-TL handles the QC3.0 handshake on the D+/D- lines while a separate FUSB302 PD controller negotiates the CC lines. Operating from 3.6 V to 20 V supply, the CHY103D-TL survives PD-induced output voltage swings and shuts down cleanly with built-in unplug detection. Its 8-pin SOIC footprint fits inside low-profile 30 W adapters and its 150 °C junction rating tolerates the higher dissipation caused by 20 V output modes without additional thermal management.
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Automotive USB Charging Port
The CHY103D-TL's -40 °C to +150 °C operating range and integrated secondary over-temperature protection suit automotive passenger-compartment and center-console USB ports that must continuously cycle QC3.0 handshakes through vehicle cranking transients. Connected to a wide-input automotive buck/boost converter such as the LT8711 or MAX20028, the CHY103D-TL negotiates 5 V to 12 V profiles on the USB rail while its on-chip protection prevents back-feeding an unplugged cable. The SOIC-8 footprint also supports conformal-coating assembly required by OEM automotive tier-1 suppliers.
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Multi-Port USB Power Hub
In a 4-port hub that mixes legacy 5 V devices with QC3.0 phones, each port needs its own CHY103D-TL to independently decode QC3.0 requests without crosstalk. The IC's low quiescent draw and small 8-pin SOIC footprint enable four instances per hub PCB without violating USB-IF spacing rules. Each CHY103D-TL instance operates from the same 5 V upstream rail and signals its own downstream converter to ramp to 9 V/12 V when only one port is in QC3.0 mode, enabling per-port power management without a central MCU.
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QC3.0 Mobile Power Bank
Portable power banks using the CHY103D-TL can deliver QC3.0-compliant 18 W output from their USB Type-A port while continuing to support legacy 5 V/2.4 A charging for older devices. The IC's wide 3.6 V-20 V supply is fed directly from the 1S or 2S Li-ion cell pack output via a buck-boost converter, eliminating an intermediate 5 V regulation stage. Built-in unplug detection prevents backflow into a disconnected cable, protecting the battery management system from voltage transients during hot-plug events at 20 V.
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Travel Adapter (Multi-Region Fast Charger)
The CHY103D-TL enables a single travel adapter PCB to be sold worldwide because the QC3.0 Class A/B handshake is recognised by phones sold in North America, Europe, and Asia. Combined with a primary-side InnoSwitch4 controller and a wide-input PFC front end, the charger delivers 45 W to 65 W from any 90 V to 264 V AC source, with the CHY103D-TL handling the D+/D- protocol layer on the secondary side. Its 8-pin SOIC eliminates the need for a secondary MCU, reducing total BOM by 4-6 parts compared to legacy QC2.0 designs.
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추천 제품 요약
엔지니어링 참조 데이터: CHY103D-TL — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | CHY103D | CHY100 |
|---|---|---|---|
| Package | SOIC-8 (SO-8) | SOIC-8 - same | SOIC-8 - same |
| Brand | Power Integrations | Power Integrations | Power Integrations |
| Protocol Support | Quick Charge 3.0 (Class A + Class B) | Quick Charge 3.0 (Class A + Class B) - identical | Quick Charge 2.0 only |
| Supply Voltage Range | 3.6 V to 20 V | 3.6 V to 20 V - identical | 3.6 V to 12 V (typical QC2.0 range) |
| Output Voltage Steps | Continuous from 3.6 V to 20 V in 200 mV increments (QC3.0) | Continuous 3.6 V to 20 V in 200 mV increments | Discrete 5 V / 9 V / 12 V profiles (QC2.0) |
| Operating Temperature | -40 °C to +150 °C | -40 °C to +150 °C - identical | -40 °C to +150 °C - identical |
| Built-in Protections | Over-voltage, over-temperature, unplug/plug-out fault | Over-voltage, over-temperature, unplug/plug-out fault - identical | Similar protection set, but for QC2.0 voltage levels |
| Packaging Suffix | -TL (Tape & Reel) | no -TL suffix (cut-tape / tube) | Various: CHY100-TR / CHY100-TL |
주요 차별점
- Full QC3.0 Class A + Class B compliance with 200 mV voltage granularity (vs CHY100)
- 20 V output capability supports Class B high-power chargers (vs CHY100 (12 V typical maximum))
- Tape-and-reel suffix for SMT production (vs CHY103D (no suffix, typically cut-tape or tube))
설계 노트
Place the CHY103D-TL within 5 mm of the USB receptacle D+/D- pins to minimize stub length on the high-impedance handshake lines. The Power Integrations CHY103D datasheet reference layout shows a 4-layer board with a continuous ground pour beneath the SOIC-8 thermal pad footprint; keep the DP/DM traces matched within 2 mm to avoid asymmetrical handshakes. Decouple VCC (pin 1) to GND (pin 2) with a 1 µF X7R ceramic capacitor placed within 3 mm of the IC, plus a 10 µF bulk cap on the upstream supply rail.
Although the CHY103D-TL only drives a low-current feedback node into the primary controller, the IC itself is powered from the charger output rail which swings from 5 V to 20 V. Estimated: at 20 V output the IC dissipates roughly 20 mA × 20 V = 400 mW worst case during active handshakes; the SOIC-8 has θJA ≈ 150 °C/W so junction rises ~60 °C above ambient - acceptable within the 150 °C rating. Adding a series 10 Ω resistor on VCC reduces fault current during output over-voltage events.
Do NOT insert a common-mode choke on D+/D- without checking the CHY103D datasheet reference - some QC3.0 handshakes rely on DC bias on these lines that an inductor blocks. Likewise, do not tie DP to DM through a pull-up/pull-down pair intended for USB 2.0 data; QC3.0 requires D+/D- to be released by the source so the device can pull them in opposite directions to encode the request. Connecting these lines to a USB 2.0 transceiver simultaneously creates loading conflicts and handshake failures.
In multi-port hubs or densely packed travel adapters, the CHY103D-TL shares PCB copper with adjacent switching converters, raising local ambient above +70 °C. At +85 °C ambient the junction rises by an Estimated 30 °C from self-heating, leaving ~35 °C margin to the +150 °C limit - adequate but no margin for downstream fault conditions. For four-port designs, increase the PCB copper pour beneath each CHY103D-TL to at least 100 mm² to drop θJA below 100 °C/W.
규정 준수 정보
RoHS compliance verified per JLCPCB listing 2026-10-20. AEC-Q100 status not stated in provided data; automotive use is supported by -40 to +150 °C rating and integrated over-temperature protection but the part is not formally AEC-Q100 qualified.
