CP2104-F03-GM - USB to UART Bridge QFN-24 | Silicon Labs
부품 번호: CP2104-F03-GM ✗ 단종| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $2.39 | $2.39 |
| 10 | $2.2 | $22.00 |
| 100 | $1.95 | $195.00 |
| 500 | $1.75 | $875.00 |
| 1,000 | $1.62 | $1,620.00 |
CP2104-F03-GM 개요
A USB-to-UART bridge is an interface IC that converts between a USB bus and a serial UART (asynchronous serial) port. It sits at the bottom of the USB interface hierarchy - below USB hubs and USB controllers - and is a type of USB bridge controller within the broader Smart Interface family of connectivity ICs. Its role is to let a microcontroller or legacy RS-232/RS-485 design communicate with a modern USB host without redesigning the serial firmware.
Key features include an integrated USB 2.0 full-speed (12 Mbps) transceiver, an integrated clock requiring no external crystal, integrated 1024-byte One-Time Programmable (OTP) ROM for customizing USB VID/PID and product strings, an on-chip power-on-reset circuit, and a 576-byte receive buffer. Because everything is integrated, a complete USB-to-serial design needs only the CP2104, two USB bus passives, and decoupling capacitors.
Technically, the CP2104 implements the USB protocol stack and UART framing in silicon. Existing RS-232 boards can often be upgraded to USB by simply replacing the RS-232 level translator with the CP2104, since its UART signals (~TXD, ~RXD, ~RTS, ~CTS, ~DTR, ~DSR, ~DCD, ~RI) map directly to legacy handshake lines. Drivers are available through the Silicon Labs USBXpress suite and standard VCP (Virtual COM Port) drivers for Windows, macOS, and Linux.
Typical applications include USB-to-serial debug and programming adapters, industrial RS-232/RS-485 to USB conversion, embedded system console ports, and consumer device firmware-update interfaces.
Design consideration: note that Silicon Labs community posts indicate this part is Not Recommended for New Designs (NRND); port to the pin-compatible CP2102N using Silicon Labs application note AN976.
This page adds distributor pricing, drop-in alternatives, pinout data, and design notes synthesized beyond the raw datasheet.
드롭인 대체품: CP2104-F03-GM — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: CP2104-F03-GM (동일 폼 팩터 및 풋프린트) — 차이점: Function, GPIO, USB Standard.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
CP2104-F03-GMR
✅ 드롭인✓ 재고 있음
$1.06 / 개
데이터시트 보기 →CP2102N-A01-GQFN24R
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
CP2105-F01-GM
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
CP2103-GM
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
CP2110-F01-GM
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
CP2104-F03-GM 사양
| 기능 | USB to UART Bridge Controller |
| USB Standard | USB 2.0 Full-Speed |
| UART Channels | 1 |
| Receive FIFO | 576 byte |
| Supply Voltage (VDD) | 3.3 V |
| 패키지 | 24-QFN (4x4 mm) with exposed pad |
| 실장 유형 | Surface Mount |
| Integrated Crystal | Yes (no external crystal required) |
| OTP ROM | 1024 byte (custom product information) |
| Power-On Reset | On-chip |
| UART Handshake Signals | ~RTS, ~CTS, ~DTR, ~DSR, ~DCD, ~RI |
| GPIO | 4 (GPIO.0 to GPIO.3) |
| Driver Support | VCP and USBXpress (Windows, macOS, Linux) |
CP2104-F03-GM 핀 구성
| 핀 1 | ~RI — Ring Indicator input (RS-232 handshake) |
| 핀 2 | GND — Ground |
| 핀 3 | D+ — USB differential data positive |
| 핀 4 | D- — USB differential data negative |
| 핀 5 | VIO — I/O supply voltage |
| 핀 6 | VDD — Power supply (3.3 V) |
| 핀 7 | REGIN — Regulator input (5 V from VBUS) |
| 핀 8 | VBUS — USB bus voltage sense |
| 핀 9 | ~RST — Device reset (active low) |
| 핀 10 | NC — Not connected (per datasheet) |
| 핀 11 | GPIO.3 — General purpose I/O 3 |
| 핀 12 | GPIO.2 — General purpose I/O 2 |
| 핀 13 | GPIO.1 — General purpose I/O 1 |
| 핀 14 | GPIO.0 — General purpose I/O 0 |
| 핀 15 | ~SUSPEND — Suspend indication (active low) |
| 핀 16 | VPP — OTP ROM programming voltage |
| 핀 17 | SUSPEND — Suspend indication (active high) |
| 핀 18 | ~CTS — Clear To Send input (active low) |
| 핀 19 | ~RTS — Request To Send output (active low) |
| 핀 20 | RXD — UART receive data |
| 핀 21 | TXD — UART transmit data |
| 핀 22 | ~DSR — Data Set Ready input (active low) |
| 핀 23 | ~DTR — Data Terminal Ready output (active low) |
| 핀 24 | ~DCD — Data Carrier Detect input (active low) |
일반적인 애플리케이션
CP2104-F03-GM 적합 용도: 6 애플리케이션s: USB-to-Serial Debug Adapters, Legacy RS-232/RS-485 to USB Conversion, Embedded Console and Firmware Update Ports, Industrial Automation and Point-of-Sale Equipment, Consumer Electronics Firmware Programming, Test and Measurement Instrumentation.
USB-to-Serial Debug Adapters
The CP2104-F03-GM is the classic core of USB-to-TTL serial debug adapters and programmer dongles. Its integrated USB 2.0 full-speed transceiver, on-chip oscillator (no crystal), and 576-byte receive FIFO let a two-layer adapter board be built with just the IC, USB connector, and a few passives. Because the CP2104 enumerates as a Virtual COM Port via the Silicon Labs VCP drivers, engineers get immediate plug-and-play console access to microcontrollers, SBCs, and routers on Windows, macOS, and Linux. The ~TXD/~RXD pins connect directly to 3.3 V logic UARTs, while six handshake signals (~RTS, ~CTS, ~DTR, ~DSR, ~DCD, ~RI) support flow-control and bootloader-entry signaling, such as DTR/RTS-based auto-reset circuits used on common development boards.
추천
Legacy RS-232/RS-485 to USB Conversion
Per the Silicon Labs datasheet, many existing RS-232 designs can be upgraded to USB simply by replacing the RS-232 level translator with the CP2104, because the bridge's UART signals map one-to-one onto legacy RS-232 handshake lines. In an industrial converter, the CP2104-F03-GM (3.3 V, 24-QFN) sits between the USB B connector and either a level translator for RS-232 or an external RS-485 transceiver for fieldbus links. The 576-byte receive FIFO absorbs burst serial traffic without host intervention, and the 1024-byte OTP ROM lets the OEM burn a custom VID/PID and product string so the converter enumerates with company branding. This is a firmware-free upgrade path: existing field-side protocol code is untouched.
추천
Embedded Console and Firmware Update Ports
Product designers embed the CP2104-F03-GM directly on the main PCB to provide a factory console port and field firmware-update interface. The on-chip power-on-reset and integrated clock eliminate external timing components, and the VIO pin lets the UART side interface with 3.3 V or lower-voltage logic domains, simplifying integration with modern MCUs. The ~DTR and ~RTS lines are commonly wired to MCU reset and boot pins to enable one-click in-system programming from a host utility. The OTP ROM allows unique serial numbers and descriptors per product line. Because the part is NRND, new PCB spins should adopt the pin-compatible CP2102N per Silicon Labs AN976 to preserve long-term supply.
추천
Industrial Automation and Point-of-Sale Equipment
Industrial HMIs, PLC programming cables, metering equipment, and point-of-sale terminals use the CP2104-F03-GM wherever a PC application must talk to a serial device. The bridge's transparent operation means existing serial software continues to run unchanged over the enumerated COM port, minimizing software regression testing during hardware transitions. The 3.3 V supply suits modern embedded platforms, while the exposed-pad QFN-24 provides solid thermal and ground performance on vibration-prone industrial boards. The OTP ROM customization (VID/PID, strings, serial number) enables fleet management and driver-binding to specific device types in deployed installations.
추천
Consumer Electronics Firmware Programming
Consumer products such as audio accessories, smart-home devices, and small appliances embed a CP2104-based programming header for production-line flashing. The single-chip integration keeps the fixture-side adapter cost near the IC's ~$2 unit price (as of 2026-10-20), and the 1024-byte OTP ROM allows per-unit serialization burned at the factory for traceability. Silicon Labs USBXpress drivers permit custom host applications that address the device directly without COM-port semantics, enabling faster, more robust production jigs. For new consumer BOMs, the pin-compatible CP2102N should be selected instead, as Silicon Labs directs NRND traffic to that family.
추천
Test and Measurement Instrumentation
Bench instruments, data loggers, and sensor interfaces use the CP2104-F03-GM to stream measurement data to a host PC over a virtual COM port. The 576-byte receive FIFO buffers bursts from high-rate ADC streams, and full-speed USB 2.0 (12 Mbps) comfortably carries typical instrument telemetry. The four GPIO pins (GPIO.0 to GPIO.3) can be driven from host software to trigger relays, select gain ranges, or control indicator LEDs, consolidating control and data into one USB cable. Exposed-pad QFN-24 mounting supports low-noise grounding important for analog-heavy instrumentation front ends.
추천
추천 제품 요약
엔지니어링 참조 데이터: CP2104-F03-GM — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | CP2104-F03-GMR | CP2102N-A01-GQFN24R | CP2105-F01-GM | CP2103-GM | CP2110-F01-GM |
|---|---|---|---|---|---|---|
| Package | 24-QFN (4x4 mm) EP | 24-QFN (4x4 mm) EP - same | 24-QFN (4x4 mm) EP - same | 24-QFN (4x4 mm) EP - same | 24-QFN | 24-QFN |
| Brand | Silicon Labs | Silicon Labs | Silicon Labs | Silicon Labs | Silicon Labs | Silicon Labs |
| UART Channels | 1 | 1 | 1 | 2 | 1 | 1 |
| Porting Notes | Reference design | None (identical die) | Requires voltage divider per AN976 | Second UART mapping differs | Feature set differences | HID capability differences |
| USB Interface | USB 2.0 Full-Speed | USB 2.0 Full-Speed | USB 2.0 Full-Speed | USB 2.0 Full-Speed | USB 2.0 Full-Speed | USB 2.0 Full-Speed |
주요 차별점
- Single-UART simplicity at lowest integration (vs CP2105-F01-GM)
- 576-byte receive FIFO (vs CP2103-GM)
- True pin-to-pin migration path exists (vs CP2102N-A01-GQFN24R)
설계 노트
The CP2104-F03-GM is Not Recommended for New Designs per Silicon Labs community and distributor listings. For any new PCB spin, select the pin-compatible CP2102N-A01-GQFN24R and follow Silicon Labs AN976 (CP2101/2/3/4/9 to CP2102N porting guide), which documents the required voltage divider on the USB pin connection for bus-powered and self-powered topologies. Continuing to design in the CP2104 risks last-time-buy pressure and broker-only sourcing.
Connect REGIN (pin 7) to VBUS (5 V) so the internal regulator generates the 3.3 V VDD; place the recommended decoupling capacitors on REGIN, VDD, and VIO close to the pins per the CP2104 datasheet bus-powered connection diagram. The VIO pin allows the UART side to operate at the target logic voltage - tie it to the MCU I/O rail and decouple locally. Ensure VBUS (pin 8) senses the bus voltage so suspend behavior and bus-powered detection function correctly.
The exposed pad on the QFN-24 must be soldered to a grounded copper pour with an array of thermal vias; it provides the main ground return for the USB transceiver, so poor pad soldering shows up as USB enumeration failures. Keep D+/D- as a matched 90-ohm differential pair routed away from UART and clock signals, and place them on the shortest possible route to the USB connector. Pins 18-24 handshake lines can be left unconnected if unused, but configure unused GPIOs per datasheet defaults to avoid floating inputs.
규정 준수 정보
Compliance data not present in provided web data; consult the Silicon Labs product page for current RoHS/REACH declarations. One distributor comparison snippet references an 'Automotive' QFN-24 variant (CP2104-F03-GMR listing text), but AEC-Q100 qualification is not confirmed - treat as not confirmed.
