DP83849IVS/NOPB - Dual 10/100 Ethernet PHY, 80-TQFP | Texas Instruments
부품 번호: DP83849IVS/NOPB ✓ 활성DP83849IVS/NOPB 개요
An Ethernet PHY is the physical-layer device that converts digital MAC data into analog signaling over twisted-pair cabling, and back again. Within the network hierarchy it sits below the MAC controller (Ethernet controller -> Ethernet transceiver -> PHY -> magnetics -> RJ45) and is the block that governs link auto-negotiation, line coding, and signal integrity at the connector. A dual-port PHY with flexible port switching lets one physical transceiver serve two independent copper ports, which is valuable in industrial gateways, switches, and test equipment where port count is fixed but routing must be configurable.
Key differentiating features include IEEE 802.3u compliance for 10BASE-T and 100BASE-TX, integrated cable diagnostics, JTAG 1149.1 test support for manufacturing bring-up, and the flexible port switching architecture that allows both ports to be exposed to the host, cascaded, or shared. The industrial temperature range of -40 C to +85 C and the Pb-free (NOPB) ordering code suit equipment that must survive harsh ambient conditions in factory, telecom, and building-automation cabinets.
Technically, the device provides a compliant physical layer for Auto-Negotiation over twisted pair, including support for parallel detection of 10BASE-T and 100BASE-TX speeds. Because the MAC interface supports both MII, RMII and SNI, the same silicon can be paired with a wide range of host controllers, from low-cost 8-bit microcontroller-based gateways to 32-bit application processors with integrated Ethernet MACs. The 80-pin TQFP body exposes both PHY channels, bias networks, LED drivers, strap configuration pins, and reference clock and power planes on a single 0.5 mm pitch footprint.
Typical applications include industrial Ethernet switches and bridges, PLC and factory automation controllers, network-attributed data acquisition equipment, telecom access units, and multi-port instrumentation racks. The DP83849IVS-EVK evaluation module from Texas Instruments is the reference platform for evaluating the device's link performance and port-switching configurations before production board layout.
Designers should note that both PHY channels share a common 3.3 V supply and ground plane, so decoupling and return-path layout discipline matter more than with a single-port PHY. Keep the analog supply filtering and 1.8 V/3.3 V core rails consistent with the reference design, route differential pairs away from switching nodes, and observe the strap resistors before power-up because they define operating mode.
This page consolidates manufacturer specifications, a drop-in cross-reference of compatible 80-pin TQFP PHYs, package details, and practical design notes that are normally spread across the datasheet, evaluation module documentation, and distributor listings.
드롭인 대체품: DP83849IVS/NOPB — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: DP83849IVS/NOPB (동일 폼 팩터 및 풋프린트) — 차이점: Temperature Grade, Number of Ports, Operating Temperature Range, Package, Package Body Size.
DP83849CVS/NOPB
✅ 드롭인가격 문의
데이터시트 보기 →DP83849IFVS/NOPB
✅ 드롭인가격 문의
데이터시트 보기 →DP83849IVS
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
DP83848IVS
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
DP83850IVS
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
DP83849IVS/NOPB 사양
| Product Type | Ethernet PHY transceiver (PHYTER DUAL) |
| Number of Ports | 2 (dual port) |
| 데이터 속도 | 10/100 Mb/s |
| Ethernet Standard | IEEE 802.3u |
| Supply Voltage Range | 3 V to 3.6 V |
| 공급 전류 | 180 mA |
| MAC Interface | MII, RMII, SNI |
| 패키지 | 80-pin TQFP (PFC), 12 x 12 mm |
| 핀 수 | 80 |
| 동작 온도 범위 | -40 C to +85 C |
| Temperature Grade | Industrial |
| Feature | Flexible port switching |
| Feature | Cable diagnostics |
| Feature | FX support |
| Test Support | JTAG 1149.1 |
| Lead-Free Ordering Code | /NOPB (Pb-free) |
| Evaluation Board | DP83849IVS-EVK |
| 실장 유형 | Surface Mount |
DP83849IVS/NOPB 80-pin tqfp (pfc), 12 x 12 mm 핀 구성 가이드
DP83849IVS/NOPB(80-pin tqfp (pfc), 12 x 12 mm 패키지)의 핀 구성입니다. 핀 번호, 기능, 연결 다이어그램은 제조사 데이터시트에 정의되어 있습니다. 정확한 풋프린트와 솔더링 지침은 해당 문서를 참조하십시오.
다음에 대한 상세 핀아웃 데이터 없음: DP83849IVS/NOPB.
다음을 참조하십시오: 데이터시트 전체 핀 구성은 다음을 참조하십시오.
일반적인 애플리케이션
DP83849IVS/NOPB 적합 용도: 6 애플리케이션s: Industrial Ethernet Switches and Port Expanders, Factory Automation PLC and Sensor Gateways, Telecom Access and Network Interface Units, Data Acquisition and Test Instrumentation, Building Automation and IoT Controllers, Network-Attached Storage and Embedded Servers.
Industrial Ethernet Switches and Port Expanders
The DP83849IVS/NOPB suits compact industrial switching nodes because two complete 10/100 Mb/s PHY channels sit in one 80-pin TQFP (PFC) package and the flexible port switching architecture lets a single host MAC connection serve both copper ports. With MII, RMII and SNI host interfaces, the same design scales from an 8-bit microcontroller gateway to a 32-bit application processor. The -40 C to +85 C industrial rating covers cabinet-mounted equipment, and cable diagnostics give operators link-level fault visibility without extra test hardware. Approximate 180 mA supply current at 3.3 V keeps dual-port power budgets modest for factory networks.
추천
Factory Automation PLC and Sensor Gateways
PLC gateways and edge sensor aggregators often need two copper ports: one for the controller network and one for downstream sensors or a local programming laptop. The DP83849IVS/NOPB provides both PHY channels in a single device, so a single 3.3 V rail and one 12 x 12 mm footprint serve both links while the flexible port switching feature allows the host firmware to decide how traffic is distributed. IEEE 802.3u compliance, auto-negotiation to 10BASE-T or 100BASE-TX, and integrated cable diagnostics suit plant floors where cable faults are a primary failure mode. The industrial temperature range matches typical machine-side ambient conditions.
추천
Telecom Access and Network Interface Units
Access units and network interface equipment often need redundant or segmented copper access. The DP83849IVS/NOPB's dual-port architecture allows one port to face the access network while the second handles internal management traffic, all inside one 80-pin TQFP (PFC) device with a single 3 V to 3.6 V supply. MII, RMII and SNI support means the same PHY can be paired with different host controllers across a product family, and the JTAG 1149.1 test interface accelerates production test of multi-link boards. Industrial temperature qualification supports deployment in outdoor or unheated telecom enclosures. Its Pb-free /NOPB ordering code fits regulated network equipment builds.
추천
Data Acquisition and Test Instrumentation
Data loggers, protocol analyzers and instrumentation racks benefit from having two copper ports on one controller: one for supervisory control and one for the device under test. The DP83849IVS/NOPB delivers both 10/100 Mb/s links from a single 80-pin TQFP footprint with MII, RMII and SNI host interfaces, which lets instrument builders reuse the same PCB across host platforms. The flexible port switching feature allows the two channels to be reconfigured in firmware as the test sequence changes, while JTAG 1149.1 access simplifies manufacturing test and board debug. Industrial temperature operation and a 3.3 V single rail simplify both lab and field instrument power designs.
추천
Building Automation and IoT Controllers
Building automation controllers and IoT edge nodes frequently need to bridge a wired upstream backbone to local wired sensors. Using the DP83849IVS/NOPB, one port can terminate the uplink and the other can serve a downstream bus, with the flexible port switching allowing the host microcontroller to share or separate the channels in software. Because the PHY is a pure physical layer, it pairs with almost any host MAC, and RMII is the natural fit for low-cost 8-bit or 32-bit microcontrollers where pin count and clocking budget are tight. Its 3.3 V supply and approximately 180 mA operating current support compact DIN-rail and embedded enclosure designs.
추천
Network-Attached Storage and Embedded Servers
Embedded servers and NAS-style appliances frequently expose multiple 10/100 Mb/s copper ports for management and storage networks. The DP83849IVS/NOPB places two PHY channels behind one host interface in a single 80-pin TQFP (PFC) package, freeing board area and reducing the number of magnetics footprints compared with two discrete PHYs. MII support allows a full-rate parallel connection to a high-performance MAC, while RMII provides a compact low-pin-count path for cost-sensitive controllers. Cable diagnostics let system software detect opens, shorts and length errors remotely, which matters for deployed units, and industrial temperature qualification supports use in chassis with elevated internal temperatures.
추천
추천 제품 요약
엔지니어링 참조 데이터: DP83849IVS/NOPB — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | DP83849CVS/NOPB | DP83849IFVS/NOPB | DP83849IVS | DP83848IVS | DP83850IVS |
|---|---|---|---|---|---|---|
| Package | 80-pin TQFP (PFC), 12 x 12 mm | 80-pin TQFP (PFC) | 80-pin TQFP (PFC) | 80-pin TQFP (PFC) | 80-pin TQFP (PFC) | 80-pin TQFP (PFC) |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Number of Ports | 2 | 2 | 2 | 2 | 1 | 1 |
| Data Rate | 10/100 Mb/s | 10/100 Mb/s | 10/100 Mb/s | 10/100 Mb/s | 10/100 Mb/s | 10/100 Mb/s |
| Supply Voltage Range | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V |
| Operating Temperature Range | -40 C to +85 C | 0 C to +70 C (commercial grade) | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| Flexible Port Switching | Yes | Yes | Yes | Yes | No (single port) | No (single port) |
| Special Feature | Industrial temperature, flexible port switching | Commercial temperature, flexible port switching | FX support, flexible port switching | Industrial temperature, flexible port switching | Single-port PHY | Single-port PHY |
주요 차별점
- Two PHY channels with flexible port switching in one device (vs DP83848IVS)
- Industrial temperature qualification (vs DP83849CVS/NOPB)
- Host flexibility across MII, RMII and SNI (vs DP83850IVS)
- Manufacturing test support built in (vs DP83849IVS)
설계 노트
The DP83849IVS/NOPB exposes two complete analog PHY channels on a 0.5 mm pitch 80-pin TQFP (PFC) body, so analog and digital return currents must be separated cleanly. Follow the recommended layout in the manufacturer data sheet and the DP83849IVS-EVK schematic: place the 50 ohm line-termination and magnetics components close to the device, keep the differential TX/RX pairs away from the digital MII/RMII/SNI traces, and provide a solid, uninterrupted ground plane under the package with stitching vias. Because both channels share the same supply pins, a single noisy supply zone can degrade both links simultaneously.
Typical supply current for this device is around 180 mA from a 3 V to 3.6 V rail, so budget roughly 0.6 W of dissipation at 3.3 V with both channels active. Place a bulk bulk-capacitor close to the supply pins and add 100 nF high-frequency ceramics at each channel's local supply connections. Estimated: with 180 mA at 3.3 V, dissipation is 0.594 W; if the board's effective junction-to-ambient thermal resistance is 40 C/W, that is roughly 24 C of temperature rise, which is why the exposed ground pad area and via stitching matter. Decouple each PHY channel's analog supply locally rather than sharing a single filter point.
Two mistakes are common when integrating the DP83849IVS/NOPB. First, the strap configuration pins define operating mode, interface selection and port behavior at reset, so the resistor network must be fitted exactly as shown in the reference design and sampled correctly at power-up. Second, because flexible port switching changes how the two channels map to the host interface, firmware that assumes a fixed port-to-MAC mapping can produce intermittent link failures. Verify the strap table and the switching configuration against the manufacturer register descriptions in the data sheet before mass production.
Keep the 25 MHz reference clock and the internal oscillator/RMI-related components away from the magnetics and the cable-side traces, since coupling into the timing reference shows up as intermittent auto-negotiation failures and CRC errors that are hard to diagnose. Provide the crystal or clock source with a tight ground return and keep the loop area minimal. If the design uses an external magnetics module, respect its creepage and isolation spacing requirements so that the isolation barrier between the logic ground and the cable-side ground is not compromised by PHY ground currents.
규정 준수 정보
The /NOPB ordering code denotes the lead-free (Pb-free) assembly option of this Texas Instruments part, as listed on the manufacturer part-details page. RoHS, REACH, halogen-free and conflict-minerals declarations are not published on the accessed distributor listings; request the current material declaration through the Request a Quote form if a compliance certificate is required for your build.
