DP83TG720S-Q1 - 1000BASE-T1 Automotive Ethernet PHY | TI
부품 번호: DP83TG720S-Q1 ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $6.2 | $6.20 |
| 10 | $5.58 | $55.80 |
| 100 | $4.96 | $496.00 |
| 500 | $4.34 | $2,170.00 |
| 1,000 | $3.85 | $3,850.00 |
DP83TG720S-Q1 개요
An Ethernet PHY (physical layer transceiver) is the IC that converts digital MAC frames into analog signals suitable for transmission over a cable medium, sitting at the lowest layer of the OSI network hierarchy: PHY -> media access controller (MAC) -> Ethernet switch -> in-vehicle network. In automotive systems, single-pair Ethernet (SPE) as defined by IEEE 802.3bp (1000BASE-T1) and the Open Alliance spec reduces wiring weight and cost compared to four-pair 1000BASE-T.
Key features include full xMII flexibility (RGMII and SGMII), compliance to IEEE 802.3bp and Open Alliance EMC and interconnect standards, and operation over unshielded or shielded single twisted-pair cable. The wettable-flank VQFN package supports optical inspection of solder joints required in automotive assembly lines, and the Q1 designation confirms AEC-Q100 automotive qualification.
The DP83TG720S-Q1 transmits PAM3 ternary symbols at 750-MBd, encoding 1000 Mbps of payload onto a lower symbol rate to relax channel bandwidth requirements over automotive cabling. Per TI datasheet and the TI ti-ethernet-software repository, mainline Linux and TI RTOS drivers (dp83tg720.c) are available, easing integration with Zynq UltraScale+ and other MAC platforms.
Typical applications include ADAS camera and radar backbone links, infotainment networks, domain and zonal gateways, and Power over Data Lines (PoDL) automotive designs - TI's PoDL reference design pairs this PHY with the DP83TC812S-Q1 for switchable 100/1000 Mbps operation.
Design consideration: verify Open Alliance EMC compliance of your magnetics and common-mode choke selection, and confirm MDIO post-reset stabilization timing (T6.2) before first MDIO access.
This page synthesizes verified datasheet data, drop-in family alternatives, application pairings, and design notes not found in the manufacturer datasheet. Pricing as of 2026-10-16.
드롭인 대체품: DP83TG720S-Q1 — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: DP83TG720S-Q1 (동일 폼 팩터 및 풋프린트) — 차이점: Package, MAC Interfaces, Product Type, Automotive Qualification, EMC Compliance.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
DP83TG720R-Q1
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
DP83TC812S-Q1
✅ 드롭인✓ 재고 있음
$3.05 / 개
데이터시트 보기 →DP83TC811S-Q1
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
DP83TG720S-Q1 사양
| Product Type | Automotive Ethernet PHY transceiver |
| Standard Compliance | IEEE 802.3bp, Open Alliance |
| Line Speed | 1000BASE-T1 (1 Gbps) |
| Line Coding | PAM3 ternary, 750 MBd |
| Medium | Single unshielded/shielded twisted pair |
| MAC Interfaces | RGMII, SGMII |
| Duplex Mode | Full, Half |
| Number of Transceivers | 1 |
| 패키지 | 36-VQFN (6x6 mm) wettable flank |
| 실장 유형 | Surface Mount |
| Automotive Qualification | AEC-Q100 (Q1 grade) |
| EMC Compliance | Open Alliance EMC compliant |
| Driver Support | Linux mainline and TI RTOS (dp83tg720.c) |
DP83TG720S-Q1 36-vqfn (6x6 mm) wettable flank 핀 구성 가이드
DP83TG720S-Q1(36-vqfn (6x6 mm) wettable flank 패키지)의 핀 구성입니다. 핀 번호, 기능, 연결 다이어그램은 제조사 데이터시트에 정의되어 있습니다. 정확한 풋프린트와 솔더링 지침은 해당 문서를 참조하십시오.
다음에 대한 상세 핀아웃 데이터 없음: DP83TG720S-Q1.
다음을 참조하십시오: 데이터시트 전체 핀 구성은 다음을 참조하십시오.
일반적인 애플리케이션
DP83TG720S-Q1 적합 용도: 6 애플리케이션s: ADAS Camera Backbone Links, Automotive Ethernet Gateways and Zonal Controllers, Power over Data Lines (PoDL) Automotive Nodes, Infotainment and Display Networks, Industrial Vision and Robotics Retrofit, Radar and Lidar Front-End Data Links.
ADAS Camera Backbone Links
The DP83TG720S-Q1 fits ADAS camera backbones because its 1 Gbps 1000BASE-T1 line rate carries high-resolution video from cameras to domain controllers over a single unshielded twisted pair, per IEEE 802.3bp. The 750-MBd PAM3 signaling relaxes channel bandwidth so standard automotive cabling meets the link budget, and Open Alliance EMC compliance addresses the radiated/conducted immunity environment of the vehicle. In the circuit, the PHY terminates the twisted pair through an automotive Ethernet magnetics/common-mode choke network and connects to a switch or SoC via RGMII or SGMII. Placing it between the camera serializer side and the ADAS ECU adds no switching noise on the MAC side while its Q1 qualification and wettable-flank package support the automotive production line.
추천
Automotive Ethernet Gateways and Zonal Controllers
Domain and zonal gateways aggregate multiple in-vehicle network segments, and the DP83TG720S-Q1 provides the 1 Gbps 1000BASE-T1 physical layer for backbone ports between zones. Its xMII flexibility (RGMII and SGMII) lets one footprint connect to many automotive Ethernet switches and SoCs without MAC-interface redesign, per the TI datasheet. AEC-Q100 Q1 qualification and Open Alliance compliance make it acceptable for body, powertrain-adjacent, and infotainment gateway programs. Typical usage: one PHY per backbone port, single twisted pair routed through the vehicle harness, 36-pin VQFN wettable-flank package for AOI inspection. The quantified benefit is wiring reduction - one lightweight twisted pair replaces heavier four-pair gigabit cabling, cutting harness mass and cost in zonal architectures.
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Power over Data Lines (PoDL) Automotive Nodes
TI's automotive PoDL reference design explicitly uses the DP83TG720S-Q1 as the 1000 Mbit/s single-pair Ethernet PHY, with the option to switch to the DP83TC812S-Q1 for 100 Mbit/s operation. PoDL delivers power and gigabit data over the same single twisted pair, which is decisive for remote cameras, lidar units, and roof-mounted sensors where running a separate power harness is costly. The PHY's IEEE 802.3bp compliance ensures interoperability with PoDL classification and power-extraction circuitry placed between the magnetics center taps and the DC-DC converter. The quantified benefit is a two-wire solution (pair plus PoDL) that halves connector count versus separate data-plus-power looms, with the wettable-flank VQFN supporting automated automotive assembly.
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Infotainment and Display Networks
Modern infotainment systems stream video and audio between head units, displays, and amplifiers over in-vehicle Ethernet. The DP83TG720S-Q1 provides the gigabit 1000BASE-T1 link needed for high-resolution display content, while its single twisted-pair medium simplifies routing through the cabin harness. Open Alliance EMC compliance is critical in the cabin where displays, touch controllers, and wireless modules coexist; the PAM3 750-MBd signaling keeps emission spectra manageable. Integration is via RGMII to automotive SoCs or SGMII to Ethernet switches, per TI datasheet xMII support. The AEC-Q100 Q1 grade covers elevated cabin temperature zones, and the 6x6 mm VQFN footprint fits dense head-unit PCBs, giving designers a compliant gigabit node without changing harness architecture.
추천
Industrial Vision and Robotics Retrofit
Although automotive-qualified, the DP83TG720S-Q1's 1 Gbps single-pair link is attractive in industrial machine-vision and robot-cell applications where 1000BASE-T1-style SPE reduces cable mass in drag chains and robot arms. The PHY transmits 1 Gbps over a single twisted pair at 750 MBd PAM3, tolerating the flexing and EMI of factory automation. Its RGMII interface connects directly to industrial SoCs and FPGAs (TI confirms connectivity work with Zynq UltraScale+ via TI E2E), and mainline Linux driver support (drivers/net/phy/dp83tg720.c) shortens software bring-up on embedded Linux platforms. The trade-off versus industrial-grade PHYs is that AEC-Q100 temperature qualification must be mapped against the industrial environment, so verify operating temperature for the deployment.
추천
Radar and Lidar Front-End Data Links
Radar and lidar sensors generate sustained multi-hundred-Mbps to gigabit data streams that must traverse the vehicle front end to processing ECUs. The DP83TG720S-Q1 supplies the 1000BASE-T1 gigabit physical layer over a single twisted pair, which is easy to route through the sensor housing grommet and A-pillar harness. Its Open Alliance EMC compliance coexists with the strong local RF fields near radar front ends, and PAM3 signaling at 750 MBd keeps radiated emissions within automotive limits per TI datasheet claims. The SGMII MAC option connects cleanly to sensor-processing SoCs and switches. Using PoDL (per TI reference design), the sensor can also be powered over the same pair, eliminating the separate power lead - a direct connector-count and mass reduction at the front end.
추천
추천 제품 요약
엔지니어링 참조 데이터: DP83TG720S-Q1 — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | DP83TG720R-Q1 | DP83TC812S-Q1 | DP83TC811S-Q1 |
|---|---|---|---|---|
| Package | 36-VQFN (6x6 mm) wettable flank | 36-VQFN (6x6 mm) - same | 36-VQFN (6x6 mm) - same footprint | 36-VQFN (6x6 mm) - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Line Speed | 1000BASE-T1 (1 Gbps) | 1000BASE-T1 (1 Gbps) | 100BASE-T1 (100 Mbps) | 100BASE-T1 (100 Mbps) |
| Line Coding | PAM3, 750 MBd | PAM3, 750 MBd | PAM3 (100BASE-T1) | PAM3 (100BASE-T1) |
| Standards Compliance | IEEE 802.3bp, Open Alliance | IEEE 802.3bp, Open Alliance | IEEE 802.3bw (100BASE-T1), Open Alliance | IEEE 802.3bw (100BASE-T1) |
| Automotive Qualification | AEC-Q100 (Q1) | AEC-Q100 (Q1) | AEC-Q100 (Q1) | AEC-Q100 (Q1) |
| Software Support | Linux mainline + TI RTOS (dp83tg720.c) | TI family drivers | Linux mainline + TI RTOS (dp83tc812.c) | Linux mainline (dp83tc811.c) |
주요 차별점
- Dual xMII flexibility (RGMII + SGMII) (vs DP83TG720R-Q1)
- Gigabit line rate on single twisted pair (vs DP83TC812S-Q1)
- Open Alliance EMC compliance with wettable flank (vs DP83TC811S-Q1)
설계 노트
The DP83TG720S-Q1 transmits PAM3 ternary symbols at 750 MBd over a single twisted pair, so channel quality dominates link margin. Keep the PHY-to-magnetics differential pair length-matched and impedance-controlled (100 ohm differential per Open Alliance SPE practice), minimize stubs at the common-mode choke, and select magnetics certified for 1000BASE-T1. Confirm the cable plant meets IEEE 802.3bp insertion-loss and return-loss masks for your harness length before layout freeze.
MDIO access requires a post-reset stabilization time prior to MDC preamble (timing T6.2 in the TI datasheet, also noted in the Linux driver dp83tg720.c source). Asserting MDC immediately after power-up or reset can cause register access failures that look like PHY defects. Delay the first MDIO transaction accordingly, and use the latest TI driver from the TexasInstruments/ti-ethernet-software GitHub repository, since older driver versions had known interop issues reported on the TI E2E forum with Zynq UltraScale+ platforms.
The 36-pin VQFN (6x6) wettable-flank package requires attention to thermal pad soldering for ground integrity and EMC performance. Follow the TI datasheet PCB layout guidelines: solid ground plane under the PHY, adequate via stitching around the media-dependent differential pair, and ceramic decoupling (100 nF per supply pin plus bulk capacitance) placed at the pins. The wettable flank enables AOI inspection but verify stencil design so the side fillet forms on all four sides per automotive IPC-class assembly expectations.
Supply voltage and power dissipation values were not present in the retrieved web data - consult the TI DP83TG720S-Q1 datasheet electrical characteristics table before finalizing the power tree. For PoDL designs, follow TI's automotive PoDL reference design, which isolates the PHY data pair from the PoDL power extraction network at the magnetics center taps and includes the DP83TC812S-Q1 swap option for 100 Mbit/s operation.
규정 준수 정보
AEC-Q100 qualification confirmed by the Q1 designation on the TI product page. RoHS/REACH/lead-free status not stated in the retrieved web data - verify on the TI product page or orderable-part detail page.
