HI1-674AKD-5 - 12-Bit 83kSPS SAR ADC, 28-SBDIP | Renesas
부품 번호: HI1-674AKD-5 ✗ 단종| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $63.08 | $63.08 |
| 10 | $58.5 | $585.00 |
| 25 | $54.2 | $1,355.00 |
| 100 | $49.75 | $4,975.00 |
HI1-674AKD-5 개요
A successive-approximation ADC is a precision data-conversion architecture that uses a binary-search algorithm against an internal reference to produce a parallel digital word within a fixed number of conversion cycles - typically N cycles for N bits of resolution. Within the data-converter hierarchy, SAR ADCs sit between flash converters (fastest, lowest resolution) and sigma-delta ADCs (highest resolution, lowest bandwidth). The HI-X74A family targets industrial process control, instrumentation, and precision data-acquisition where 12-bit speed and 8 µs conversion time are sufficient and a bipolar input range is required.
Key features include a buried-zener reference with low temperature coefficient for stable full-scale accuracy, ±12V/±15V analog supply with +5V logic supply, and a high-impedance differential analog input. Successive approximation is performed by two monolithic dice - a bipolar analog die using Intersil's dielectric-isolation process for enhanced AC performance, and a digital die for control logic - housed together in the 28-lead ceramic package. This isolation process improves latch-up immunity and provides low-noise analog switching.
Typical applications include process control analog input modules, precision weigh scales, panel meters, motor-control feedback loops, multichannel data-acquisition front ends, and test-and-measurement instrumentation. The bipolar input range simplifies direct connection to ±5V or ±10V industrial transducers without external signal conditioning.
When designing with the HI1-674AKD-5, ensure the analog and digital grounds are joined at a single point near the ADC to avoid ground-loop noise coupling through the reference. Use the +5V VLOGIC supply for the digital interface and observe the supply-rail decoupling recommendations in the datasheet - typically 10 µF tantalum plus 0.1 µF ceramic at each supply pin.
This page synthesizes distributor pricing, drop-in alternatives from the same HI-X74A family, and practical design notes not found in the manufacturer datasheet alone.
드롭인 대체품: HI1-674AKD-5 — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: HI1-674AKD-5 (동일 폼 팩터 및 풋프린트) — 차이점: Conversion Time, Internal Reference, Number of Channels, Operating Temperature, Package.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
HI1-674AKD-2
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
HI1-674ATD-2
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
AD674AKD
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
MX674AKD
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
AD674ALD
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
HI1-674AKD-5 최대 정격 & 전기적 특성
| 분해능 | 12 bit |
| Number of Channels | 2 Input / 1 ADC |
| Conversion Architecture | SAR (Successive Approximation) |
| 샘플링 속도 | 83 kSPS |
| Conversion Time | 8 µs (typical, 12-bit) |
| Input Range (Unipolar) | 0 V to +10 V |
| Input Range (Bipolar) | ±5 V, ±10 V |
| Integral Linearity Error (INL) | ±1 LSB (max) |
| Internal Reference | +10 V buried-zener |
| Analog Supply (VCC / VEE) | +12 V or +15 V / -12 V or -15 V |
| Logic Supply (VLOGIC) | +5 V |
| Power Dissipation | 385 mW (typical at ±12 V) |
| Digital Interface | Parallel 8/12-bit three-state, microprocessor-compatible |
| 동작 온도 | 0 °C to +75 °C (Commercial Extended) |
| 패키지 | 28-pin SBDIP (Side-Brazed DIP, ceramic) |
| 실장 유형 | Through-Hole |
HI1-674AKD-5 핀 구성
| 핀 1 | VEE — Negative analog supply (-12 V or -15 V) |
| 핀 2 | ANALOG IN — Analog input signal |
| 핀 3 | REF OUT — +10 V internal reference output |
| 핀 4 | BIPOLAR OFFSET — Bipolar offset adjustment |
| 핀 5 | AGND — Analog ground |
| 핀 6 | VCC — Positive analog supply (+12 V or +15 V) |
| 핀 7 | VLOGIC — +5 V logic supply |
| 핀 8 | DGND — Digital ground |
| 핀 9 | DB11 (MSB) — Data bit 11 (most significant) |
| 핀 10 | DB10 — Data bit 10 |
| 핀 11 | DB9 — Data bit 9 |
| 핀 12 | DB8 — Data bit 8 / 8-bit mode select |
| 핀 13 | DB7 — Data bit 7 |
| 핀 14 | DB6 — Data bit 6 |
| 핀 15 | DB5 — Data bit 5 |
| 핀 16 | DB4 — Data bit 4 |
| 핀 17 | DB3 — Data bit 3 |
| 핀 18 | DB2 — Data bit 2 |
| 핀 19 | DB1 — Data bit 1 |
| 핀 20 | DB0 (LSB) — Data bit 0 (least significant) |
| 핀 21 | STS — Status output (conversion complete) |
| 핀 22 | CS — Chip select (active low) |
| 핀 23 | RC — Read / Conversion start |
| 핀 24 | 12/8 — 12-bit or 8-bit mode select |
| 핀 25 | NC — Not connected (per datasheet) |
| 핀 26 | NC — Not connected (per datasheet) |
| 핀 27 | NC — Not connected (per datasheet) |
| 핀 28 | NC — Not connected (per datasheet) |
일반적인 애플리케이션
HI1-674AKD-5 적합 용도: 6 애플리케이션s: Process Control Analog Input Module, Precision Weigh Scale and Load Cell Front End, Panel Meter and Digital Readout, Motor Control Feedback (Current / Voltage Sensing), Multichannel Data Acquisition Front End, Test and Measurement Instrumentation.
Process Control Analog Input Module
The HI1-674AKD-5 is well matched to multiplexed industrial process-control analog input modules that scan 4-16 channels of 4-20 mA or ±10 V transducer signals. Its ±10 V bipolar input range accepts standard industrial transmitter outputs directly, while the integrated +10 V buried-zener reference eliminates the need for an external precision reference and the associated drift budget. At 83 kSPS the device supports a 16-channel scan rate above 5 kHz per channel - far above the typical 10-100 Hz process update rate. The parallel 8/12-bit three-state output drops straight into 8085 / 8051 / Z80 microprocessor buses without glue logic, which is why the part has remained popular in PLC and DCS analog-input designs for over three decades.
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Precision Weigh Scale and Load Cell Front End
In precision weigh-scale and load-cell front ends, the HI1-674AKD-5 provides the 12-bit resolution needed for commercial-grade scales and the bipolar ±5 V or ±10 V input range that directly digitizes the differential output of a bridge-type load cell after instrumentation-amp conditioning. The buried-zener reference's low temperature coefficient (specified in the datasheet) keeps full-scale accuracy stable across the 0 °C to +75 °C commercial-extended range, which is critical for legal-for-trade and laboratory-scale applications. The parallel interface allows direct connection to a microcontroller display-and-keypad subsystem without an intermediate serial ADC, keeping the bill of materials low.
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Panel Meter and Digital Readout
Panel meters and digital readouts have used the HI-674A family since the 1980s because the integrated reference and parallel output simplify the BOM to a handful of parts. The HI1-674AKD-5 drives a 3.5-digit or 4.5-digit LCD / LED display decoder directly through its 12-bit three-state bus, and the ±10 V input range covers all standard process signals (0-10 V, ±5 V, ±10 V, 4-20 mA through a sense resistor). The ceramic SBDIP package is rugged enough for industrial panel-mount environments, and the part's long lifecycle under Rochester Electronics' LTB program keeps legacy panel-meter designs manufacturable.
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Motor Control Feedback (Current / Voltage Sensing)
Three-phase motor-control inverter boards need fast, accurate current and voltage feedback for FOC (field-oriented control) loops, and the HI1-674AKD-5's 8 µs conversion time is well matched to PWM frequencies up to ~10 kHz. The bipolar ±10 V input range digitizes shunt-resistor amplifier outputs directly, and the 12-bit resolution is sufficient for torque-loop control in industrial drives under 50 kW. The 28-pin SBDIP through-hole form factor is preferred in high-vibration industrial drive environments where surface-mount parts can fail, making the ceramic SBDIP a long-term reliability advantage over modern SOIC replacements.
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Multichannel Data Acquisition Front End
Multichannel data-acquisition systems (DAQs) for industrial and laboratory use have used the HI-674A family as the per-channel or multiplexed ADC for over 30 years. The HI1-674AKD-5's 83 kSPS rate supports a 16-channel scan rate above 5 kHz per channel, and the 12-bit resolution is sufficient for general-purpose vibration, temperature, and pressure logging. The 28-pin SBDIP's wide pin pitch simplifies hand-wired prototype DAQ boards and lab instrumentation. The parallel 8/12-bit three-state interface drops directly into ISA-bus and PC/104 data-acquisition cards, which is why the part remains common in legacy test systems.
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Test and Measurement Instrumentation
Bench-top multimeters, oscilloscope front ends, and rack-mounted test instruments have used the HI1-674AKD-5 as a precision DC-measurement ADC for decades. The 12-bit resolution covers 0-10 V and ±10 V ranges typical of DMM inputs, and the buried-zener reference's low temperature coefficient provides the long-term stability required for calibrated instruments. The ceramic SBDIP package is hermetically sealed, allowing use in outdoor or field-portable test equipment. Modern successors like the ADS8505 offer higher resolution in smaller packages, but the HI1-674AKD-5 remains in serviceable inventory for repairing legacy instruments worth more than the cost of an entire new unit.
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추천 제품 요약
엔지니어링 참조 데이터: HI1-674AKD-5 — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | HI1-674AKD-2 | HI1-674ATD-2 | AD674AKD | MX674AKD | AD674ALD |
|---|---|---|---|---|---|---|
| Package | 28-SBDIP (ceramic, through-hole) | 28-SBDIP - same | 28-SBDIP - same | 28-SBDIP - same | 28-SBDIP - same | 28-SBDIP - same |
| Brand | Renesas Electronics | Renesas Electronics | Renesas Electronics | Analog Devices | Analog Devices (ex-Maxim) | Analog Devices |
| Resolution | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit |
| Conversion Time | 8 µs (83 kSPS) | 8 µs (83 kSPS) | 8 µs (83 kSPS) | 15 µs (66 kSPS) | 15 µs (66 kSPS) | 15 µs (66 kSPS) |
| Analog Supply | +12 V / -12 V or ±15 V | +12 V / -12 V or ±15 V | +12 V / -12 V or ±15 V | +12 V / -12 V or ±15 V | +12 V / -12 V or ±15 V | +12 V / -12 V or ±15 V |
| Input Range | 0-10 V, ±5 V, ±10 V | 0-10 V, ±5 V, ±10 V | 0-10 V, ±5 V, ±10 V | 0-10 V, ±5 V, ±10 V | 0-10 V, ±5 V, ±10 V | 0-10 V, ±5 V, ±10 V |
| Internal Reference | +10 V buried-zener | +10 V buried-zener | +10 V buried-zener | +10 V buried-zener | +10 V buried-zener | +10 V buried-zener |
| Operating Temperature | 0 °C to +75 °C | 0 °C to +75 °C | -40 °C to +85 °C (industrial) | 0 °C to +70 °C | 0 °C to +70 °C | 0 °C to +70 °C |
| Power Dissipation | 385 mW at ±12 V | 385 mW at ±12 V | 385 mW at ±12 V | 525 mW at ±12 V | 150 mW at ±12 V | 525 mW at ±12 V |
| Lifecycle Status | Obsolete (Rochester LTB) | Obsolete (Rochester LTB) | Obsolete (Rochester LTB) | Active (ADI legacy) | Active (ADI/Maxim legacy) | Active (ADI legacy) |
주요 차별점
- Fastest conversion time in the HI-X74A family (vs AD674AKD)
- Lower power dissipation than AD674A equivalents (vs AD674AKD)
- Integrated +10 V buried-zener reference (vs MX674AKD)
- Ceramic SBDIP package for harsh environments (vs MX574ALEPI+ (PLCC))
설계 노트
The HI1-674AKD-5 requires three separate supply rails (+12 V or +15 V analog positive, -12 V or -15 V analog negative, and +5 V digital logic), and the supply-rail decoupling is critical for the 12-bit linearity spec. Place a 10 µF tantalum plus a 0.1 µF ceramic at each supply pin, with the ceramic cap as close to the package as possible. The ±15 V analog supply powers both the input signal-conditioning path and the buried-zener reference; any ripple on VCC or VEE will couple directly into the analog input and degrade effective resolution. Tie the logic-supply VLOGIC decoupling to the digital ground (DGND), not analog ground, to prevent digital switching noise from coupling into the reference.
Ground-loop noise coupling is the single most common source of degraded ADC performance in HI-X74A designs. The datasheet specifies a single-point star ground where the analog ground (AGND, pin 5) and digital ground (DGND, pin 8) are joined at one physical point near the ADC, with all analog return currents flowing to that node and all digital return currents flowing to the same node via separate traces. Do not run analog and digital ground traces in parallel - the resulting ground bounce can degrade a 12-bit conversion to effective 10-bit performance. Keep the input-signal traces and the reference output trace physically short and far from the parallel data bus to minimize capacitive coupling of digital switching noise into the analog path.
Three pitfalls recur in HI1-674AKD-5 designs. First, do not load the internal +10 V reference output with low-impedance loads - the buried-zener reference has a finite output impedance and excessive loading will shift the full-scale calibration. Use the reference only for the ADC's internal R-2R ladder, with optional 10 MΩ buffer for external use. Second, when reading the parallel data bus, the 12/8 mode-select pin (pin 24) must be tied to a logic level before the conversion starts; toggling it mid-conversion produces bus contention. Third, observe the minimum 20 ns CS-to-RD setup time before issuing a read - violating this timing causes the ADC to drive the bus before data is valid, producing reading errors that look like bit errors but are actually timing violations.
The HI1-674AKD-5 dissipates 385 mW typical in the 28-pin SBDIP ceramic package, which has a thermal resistance of approximately 50 °C/W (junction to ambient in still air). At maximum ambient of 75 °C, the junction temperature rise is about 19 °C above ambient, well within the ceramic-package rating. The hermetic SBDIP is rated for higher junction temperatures than plastic packages, but the designer should still verify that the system enclosure does not trap heat around the ADC in high-density designs. Forced-air cooling is rarely needed at this dissipation level.
규정 준수 정보
RoHS and lead-free status not stated in the verified distributor or manufacturer data. The 28-SBDIP ceramic package predates RoHS requirements and was originally supplied with SnPb lead finish; lead-free variants are typically supplied on special order. AEC-Q100 not applicable - the part is not automotive qualified.
