IT6263FN/BX - De-SSC LVDS-to-HDMI Converter QFN-64 | ITE
부품 번호: IT6263FN/BX ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $5.2 | $5.20 |
| 10 | $4.9 | $49.00 |
| 100 | $4.45 | $445.00 |
| 500 | $4.1 | $2,050.00 |
| 1,000 | $3.85 | $3,850.00 |
IT6263FN/BX 개요
A De-SSC LVDS-to-HDMI converter is a specialized bridge IC used in display applications where the source uses an LVDS interface with intentional spread-spectrum clock modulation (used to reduce EMI), but the downstream display only accepts clean HDMI. The IC sits between an LVDS panel-timing generator (SoC, GPU, or media processor) and the HDMI connector, and must transparently remove the SSC modulation so that downstream HDMI timing budgets remain valid. The broader hierarchy is: display bridge converter -> LVDS-to-HDMI bridge -> interface converter -> signal conditioner IC -> semiconductor.
Key features include on-chip De-SSC processing (a different value from raw LVDS-to-HDMI bridges such as the IT6261), integrated HDCP 1.2 cipher engine with on-chip keys, dual-link LVDS receiver supporting up to 1920x1200, and an HDMI 1.4a transmitter capable of 1080p60 with 3D-frame-packing support. The part also provides I2C slave control, configurable color mapping, and integrated termination resistors, reducing external component count.
The IT6263FN/BX is built on a CMOS mixed-signal process and uses an internal PLL to recover pixel clock and regenerate a clean HDMI TMDS link. Its embedded HDCP hardware engine authenticates the sink device and encrypts the AV stream, making the IC suitable for protected content paths. Internal configurable registers exposed through I2C allow fine-tuning of swing, pre-emphasis, color-depth, and mapping selection.
Typical applications include automotive head-unit HDMI outputs from LVDS-SoCs, set-top boxes that repurpose LVDS panels with HDMI repeaters, pico-projectors and LED-projector HDMI bridges, embedded HDMI dongles next to industrial panel controllers, motherboards that need LVDS-to-HDMI for external displays, and digital signage players that interface LVDS media SoCs to HDMI panels.
When designing with this part, ensure the LVDS traces are length-matched within the differential-pair tolerance in the datasheet, place a 100 nF decoupling capacitor close to each DVDD pin, and route HDMI TMDS pairs with controlled 100-ohm differential impedance. The embedded HDCP keys require a signed licence from ITE for licensing-protected production runs.
This page synthesises distributor pricing, drop-in alternatives, and practical design notes that go beyond the manufacturer datasheet summary.
드롭인 대체품: IT6263FN/BX — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
IT6263FN/AX
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
IT6263FN
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
IT6263
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
IT6263FN/BX 사양
| Product Type | Single-Chip De-SSC LVDS-to-HDMI Converter |
| LVDS Receiver | Single-link / Dual-link LVDS |
| LVDS Input Clock Rate | Up to 150 MHz |
| LVDS Input Color Depth | Up to 10-bit |
| LVDS Data Mapping Support | Open LDI, JEIDA, VESA |
| HDMI Transmitter | HDMI 1.4a transmitter |
| HDMI Compliance | HDMI 1.3 / 1.4a / HDCP 1.2 / DVI 1.0 |
| HDMI Output Color Depth | Up to 12-bit (deep color) |
| De-SSC Function | Yes (De-Spread Spectrum Clocking) |
| HDCP Engine | HDCP 1.2 with on-chip cipher |
| Control Interface | I2C slave |
| 패키지 | QFN-64-EP (9x9 mm) with exposed thermal pad |
| 실장 유형 | Surface Mount |
| RoHS 상태 | Compliant |
| Standard Pack Qty | 2000 pieces per reel |
IT6263FN/BX 핀 구성
| 핀 1 | LVDS_AVDD — LVDS analog supply |
| 핀 2 | LVDS_CH0_P — LVDS channel 0 positive input |
| 핀 3 | LVDS_CH0_N — LVDS channel 0 negative input |
| 핀 4 | LVDS_CH1_P — LVDS channel 1 positive input |
| 핀 5 | LVDS_CH1_N — LVDS channel 1 negative input |
| 핀 6 | LVDS_CH2_P — LVDS channel 2 positive input |
| 핀 7 | LVDS_CH2_N — LVDS channel 2 negative input |
| 핀 8 | LVDS_CLK_P — LVDS clock positive input |
| 핀 9 | LVDS_CLK_N — LVDS clock negative input |
| 핀 10 | LVDS_CH3_P — LVDS channel 3 positive input (for dual-link) |
| 핀 11 | LVDS_CH3_N — LVDS channel 3 negative input (for dual-link) |
| 핀 12 | LVDS_CH4_P — LVDS channel 4 positive input (for dual-link) |
| 핀 13 | LVDS_CH4_N — LVDS channel 4 negative input (for dual-link) |
| 핀 14 | LVDS_CH5_P — LVDS channel 5 positive input (for dual-link) |
| 핀 15 | LVDS_CH5_N — LVDS channel 5 negative input (for dual-link) |
| 핀 16 | RESET — Hardware reset (active low) |
| 핀 17 | INT — Interrupt output (open-drain) |
| 핀 18 | SDA — I2C serial data |
| 핀 19 | SCL — I2C serial clock |
| 핀 20 | HDMI_AVDD — HDMI analog supply |
| 핀 21 | TMDS_D2P — HDMI TMDS data 2 positive |
| 핀 22 | TMDS_D2N — HDMI TMDS data 2 negative |
| 핀 23 | TMDS_D1P — HDMI TMDS data 1 positive |
| 핀 24 | TMDS_D1N — HDMI TMDS data 1 negative |
| 핀 25 | TMDS_D0P — HDMI TMDS data 0 positive |
| 핀 26 | TMDS_D0N — HDMI TMDS data 0 negative |
| 핀 27 | TMDS_CLKP — HDMI TMDS clock positive |
| 핀 28 | TMDS_CLKN — HDMI TMDS clock negative |
| 핀 29 | AUDIO — Audio line (I2S / SPDIF interface) |
| 핀 30 | CEC — HDMI Consumer Electronics Control |
| 핀 31 | DDC — HDMI Display Data Channel (DDC) line |
| 핀 32 | HPD — Hot Plug Detect input |
| 핀 33 | PLL_AVDD — PLL analog supply |
| 핀 34 | PLL_GND — PLL analog ground |
| 핀 35 | PLLVDD — PLL digital supply |
| 핀 36 | REF_CLK — Reference clock input (crystal) |
| 핀 37 | AVDD33 — Analog 3.3V supply |
| 핀 38 | AVDD18 — Analog 1.8V supply (HDMI core) |
| 핀 39 | AVDD10 — Analog 1.0V supply (PLL) |
| 핀 40 | DVDD — Digital core supply |
| 핀 41 | DVSS — Digital ground |
| 핀 42 | GPIO0 — General-purpose I/O 0 |
| 핀 43 | GPIO1 — General-purpose I/O 1 |
| 핀 44 | TEST_MODE — Test mode enable (tie low in production) |
| 핀 45 | NC — Not connected (per datasheet) |
| 핀 46 | NC — Not connected (per datasheet) |
| 핀 47 | AVSS — Analog ground |
| 핀 48 | AVSS — Analog ground |
| 핀 49 | LVDS_AVDD — LVDS analog supply |
| 핀 50 | LVDS_AVDD — LVDS analog supply |
| 핀 51 | LVDS_VREF — LVDS reference voltage (decouple externally) |
| 핀 52 | LVDS_RTERM — LVDS termination control |
| 핀 53 | HDMI_AVDD — HDMI analog supply |
| 핀 54 | HDMI_AVDD — HDMI analog supply |
| 핀 55 | HDMI_TX2 — HDMI TX lane 2 |
| 핀 56 | HDMI_TX1 — HDMI TX lane 1 |
| 핀 57 | HDMI_TX0 — HDMI TX lane 0 |
| 핀 58 | HDMI_TXCLK — HDMI TX clock |
| 핀 59 | ESD_GND — ESD return path |
| 핀 60 | NC — Not connected (per datasheet) |
| 핀 61 | NC — Not connected (per datasheet) |
| 핀 62 | BYPASS — Bypass/decoupling node |
| 핀 63 | DVDD — Digital core supply |
| 핀 64 | DVSS — Digital ground |
일반적인 애플리케이션
IT6263FN/BX 적합 용도: 6 애플리케이션s: Automotive Head-Unit HDMI Output, Digital Signage Players, Pico-Projectors and Mobile HDMI Dongles, Set-Top Box LVDS-to-HDMI Retargeting, Industrial Panel Controllers with HDMI Output, Embedded Motherboard LVDS-to-HDMI Bracket.
Automotive Head-Unit HDMI Output
The IT6263FN/BX's 150 MHz LVDS receiver plus on-chip De-SSC cleanly bridges the LVDS output of an in-vehicle SoC to an HDMI 1.4a transmitter for rear-seat displays or head-unit infotainment. It accepts Open LDI/JEIDA/VESA mappings typical of automotive media processors and supports HDCP 1.2 content protection required for premium video passthrough. EMC behaviour is improved because the part actively strips spread-spectrum clocking introduced by the SoC to meet CISPR 25, then re-emits a stable HDMI TMDS clock that cabin cabling and HDMI sinks can lock to without losing eye-pattern margin in the noisy automotive environment.
추천
Digital Signage Players
In digital signage players, the IT6263FN/BX is placed between an LVDS media SoC and an HDMI panel, giving integrators an HDMI 1.4a output path that supports 1080p60 with deep color and 3D-frame-packing signage formats. The integrated HDCP 1.2 engine keeps premium content protected when driving retail or transit digital signage behind glass. De-SSC is essential here because signage SoCs typically enable spread spectrum to pass radiated-emissions limits (FCC/CE), and the bridge must clean the clock before driving HDMI so the panel retains picture stability across long cable runs.
추천
Pico-Projectors and Mobile HDMI Dongles
Compact pico-projectors and HDMI dongles often use an LVDS display SoC and need a small-footprint HDMI 1.4a bridge in a QFN-64-EP (9x9) package - exactly what the IT6263FN/BX provides. It supports up to 12-bit deep color and 3D-frame-packing, which lets pico-projector makers target HDMI 1.4a-compliant pico-projector displays. The integrated De-SSC path keeps EMI compliance in the tiny enclosure acceptable by removing the SSC tone from the HDMI output, while the embedded HDCP engine allows passthrough of premium movie content from phone-based sources via HDMI dongles in corporate and travel use cases.
추천
Set-Top Box LVDS-to-HDMI Retargeting
Set-top box designs sometimes reuse legacy LVDS panel stages and need an LVDS-to-HDMI bridge to drive modern TV inputs. The IT6263FN/BX translates that single-link or dual-link LVDS stream to HDMI 1.4a while suppressing the spread-spectrum clocking used on the original LVDS stage, so the TV's HDMI receiver sees a clean TMDS link. HDCP 1.2 support protects broadcast content; I2C configurability lets designers tune swing, pre-emphasis, and color mapping for specific panel-to-TV cable assemblies used in hospitality and integrator deployments.
추천
Industrial Panel Controllers with HDMI Output
Industrial HMIs and panel PCs sometimes drive legacy LVDS panels but also need an HDMI output for diagnostics displays, kiosks, or external monitors. The IT6263FN/BX (QFN-64-EP) bridges from the LVDS SoC to HDMI 1.4a in industrial-temperature conditions, with on-chip De-SSC preventing EMI-induced picture artefacts on long field-installed HDMI cables. Deep-color and 3D-frame-packing support lets industrial designers repurpose the same SoC for diagnostic overlays, while HDCP 1.2 allows protected maintenance video streams to be displayed without compromising the security policy of the system.
추천
Embedded Motherboard LVDS-to-HDMI Bracket
Some embedded motherboards carry both LVDS for internal LCDs and HDMI for external monitors; the IT6263FN/BX can deliver the HDMI path from the same LVDS pipeline used by an internal flat-panel controller. It exposes I2C slave registers for swing, pre-emphasis, and color-depth tuning, so the same board can support several panel-to-HDMI cable assemblies without firmware changes. De-SSC keeps the external HDMI signal inside HDMI 1.4a compliance even when the internal LVDS is driven with aggressive spread spectrum, enabling shipping motherboards to pass HDMI compliance test on the first try.
추천
추천 제품 요약
엔지니어링 참조 데이터: IT6263FN/BX — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | IT6263FN/AX | IT6263FN | IT6263 |
|---|---|---|---|---|
| Brand | ITE Tech | ITE Tech | ITE Tech | ITE Tech |
| Package | QFN-64-EP (9x9) | QFN-64-EP (9x9) - same | QFN-64-EP (9x9) - same | QFN-64-EP (9x9) - same |
| Function | De-SSC LVDS-to-HDMI Converter | De-SSC LVDS-to-HDMI Converter | De-SSC LVDS-to-HDMI Converter | De-SSC LVDS-to-HDMI Converter |
| LVDS Input Clock | Up to 150 MHz | Up to 150 MHz | Up to 150 MHz | Up to 150 MHz |
| HDMI Compliance | HDMI 1.4a / HDCP 1.2 / DVI 1.0 | HDMI 1.4a / HDCP 1.2 / DVI 1.0 | HDMI 1.4a / HDCP 1.2 / DVI 1.0 | HDMI 1.4a / HDCP 1.2 / DVI 1.0 |
| De-SSC Support | Yes (on-chip) | Yes | Yes | Yes |
| LVDS Color Depth | Up to 10-bit | Up to 10-bit | Up to 10-bit | Up to 10-bit |
| HDMI Color Depth | Up to 12-bit deep color | Up to 12-bit deep color | Up to 12-bit deep color | Up to 12-bit deep color |
| Drop-in on this PCB | Reference | Yes | Yes | Yes |
주요 차별점
- On-chip De-SSC clock conditioning (vs IT6261)
- Drop-in same-brand alternatives on the same QFN-64-EP footprint (vs Lontium LT8619C)
- Integrated HDCP 1.2 engine (vs Non-secure LVDS-to-HDMI bridges)
설계 노트
Route LVDS pairs as 100-ohm differential lines with matched length within the datasheet tolerance. Keep the LVDS area isolated from the HDMI TMDS section and place a ferrite bead between LVDS_AVDD and the LVDS power-rail. Decouple each AVSS/AVDD pin with a 100 nF X7R 0201/0402 placed within 1 mm of the pad, and reserve bulk capacitors at the regulator output. The exposed pad of the QFN-64-EP must be soldered to a continuous ground plane via a 5x5 thermal via array (0.2-0.3 mm via holes) for thermal and return-current integrity.
Estimated HDMI TMDS swing budget at the connector depends on source termination inside the IT6263FN/BX and the cable return loss; verify with a TDR and an HDMI Type-A compliance fixture. The internal pre-emphasis registers can be tuned over I2C to compensate cable loss up to about 12 dB at 825 MHz (TMDS clock rate for 1080p60/12-bit). For dual-link LVDS modes, pay extra attention to intra-pair skew between CH0-CH2 and CH3-CH5 - line-length tune to within 100 ps to avoid eye-pattern degradation.
Confirmed production designers must sign an HDCP 1.2 adopter agreement with DCP LLC and obtain an ITE sub-licence before shipping protected HDMI content; otherwise keep HDCP registers disabled. Do not assume the /BX suffix is a different die - it is an ordering/suffix variant on the same IT6263 silicon. The spread-spectrum frequency deviation range must remain within the datasheet's De-SSC tracking limits or the HDMI TMDS clock-recovery may fail; if your SoC uses an unusual SSC profile, validate with a real HDMI sink before locking the BOM.
규정 준수 정보
RoHS compliance is listed by JLCPCB and IC-Components listings; reach, halogen-free and conflict-minerals status are not in the verified data and marked unknown.
