KSZ9021GQI - Gigabit Ethernet PHY, GMII/MII, 128-PQFP | Microchip
부품 번호: KSZ9021GQI ⚠ 최종 구매| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $11.2 | $11.20 |
| 10 | $10.4 | $104.00 |
| 100 | $9.1 | $910.00 |
| 500 | $7.95 | $3,975.00 |
| 1,000 | $7.1 | $7,100.00 |
KSZ9021GQI 개요
What is an Ethernet PHY transceiver? A PHY is the physical-layer device in the OSI stack that connects a link-layer MAC to the analog copper or optical medium, performing line coding, echo/return-loss cancellation, adaptive equalization, and clock/data recovery. The KSZ9021GQI is a single-port Gigabit PHY that combines the PCS (physical coding sublayer) and PMA (physical medium attachment) functions plus the analog front end, exposing a parallel GMII (Gigabit Media-Independent Interface) or MII to the host MAC. It sits below the MAC in the Ethernet stack and above the magnetics/RJ-45.
Key features include 10/100/1000 Mbps operation on a single port, auto-negotiation and HP Auto-MDIX for crossover-polarity independence, four RGMII timing modes, per-port LED status drivers, JTAG and MDC/MDIO management, and a Wake-on-LAN link-change interrupt. Power consumption is about 400 mW active at 1000 Mbps and well below 100 mW in Energy-Efficient Ethernet (EEE) or software power-down modes. Typical industrial-grade operating temperature spans -40 C to +85 C.
Internally, the silicon uses DSP-based adaptive equalization, a 125 MHz reference clock and a 1.25 GHz serializer, supporting both 1000Base-T PAM-5 (5-level pulse amplitude modulation across four twisted pairs simultaneously) and traditional 10/100BASE-TX MLT-3. A hardware-driven auto-MDI/MDIX eliminates the need for crossover cables and reduces system BOM.
Typical applications include industrial Ethernet switches and routers, factory automation controllers, IP cameras and network video recorders, network-attached storage and embedded Linux networking, and telecommunications line cards. The 128-pin PQFP footprint is widely used on older and ruggedized designs that favor a leaded package over leadless QFN.
When designing with this device, follow the typical-application circuit in the datasheet: four 1 percent 49.9 ohm termination resistors to the MDI pins, a 25 MHz reference crystal or external oscillator, 0.1 uF and 10 uF decoupling on each supply pin, and magnetics rated for 1000Base-T. Keep the analog/digital/PLL supply layouts separated by ferrite beads if specified. Note this part is moving toward end-of-life - confirm lifecycle status with Microchip before committing new designs.
드롭인 대체품: KSZ9021GQI — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
KSZ9021GQ
✅ 드롭인✓ 재고 있음
$4.9832 / 개
데이터시트 보기 →KSZ9021GQI-TR
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
KSZ9021RND
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
KSZ9021GQI 사양
| 기능 | 10/100/1000 Base-T Ethernet PHY transceiver |
| 데이터 속도 | 10 Mbps / 100 Mbps / 1000 Mbps |
| MAC Interface | GMII, MII |
| Number of Ports | 1 |
| Number of Drivers / Receivers | 8 / 8 |
| Supply Voltage Range | 3.135 V to 3.465 V |
| Typical Supply Voltage | 3.3 V |
| 동작 온도 범위 | -40 C to +85 C |
| 패키지 | 128-PQFP (14x20 mm) |
| Auto-MDIX | Yes |
| Auto-Negotiation | Yes (IEEE 802.3u/clause 28/40) |
| MTL Termination | Integrated (no external resistors on MDI lines) |
| Reference Clock | 25 MHz external |
| Management Interface | MDC/MDIO (IEEE 802.3 clause 22/45) |
| LED Indicators | Two per-port (speed and link/activity configurable) |
| 실장 유형 | Surface Mount |
| Compliance | IEEE 802.3, 802.3u, 802.3ab, 802.3az (EEE) |
| RoHS 상태 | Compliant |
KSZ9021GQI 128-pqfp (14x20 mm) 핀 구성 가이드
KSZ9021GQI(128-pqfp (14x20 mm) 패키지)의 핀 구성입니다. 핀 번호, 기능, 연결 다이어그램은 제조사 데이터시트에 정의되어 있습니다. 정확한 풋프린트와 솔더링 지침은 해당 문서를 참조하십시오.
다음에 대한 상세 핀아웃 데이터 없음: KSZ9021GQI.
다음을 참조하십시오: 데이터시트 전체 핀 구성은 다음을 참조하십시오.
일반적인 애플리케이션
KSZ9021GQI 적합 용도: 6 애플리케이션s: Industrial Ethernet Switches, Embedded Linux Networking on SBCs, IP Cameras and Network Video Recorders, Factory Automation and PLCs, Telecommunications Line Cards, Network-Attached Storage and Embedded Servers.
Industrial Ethernet Switches
The KSZ9021GQI is widely used as the per-port PHY inside industrial managed and unmanaged Ethernet switches operating at 10/100/1000 Mbps. Its triple-speed auto-negotiation, HP Auto-MDIX (which eliminates crossover-cable concerns), and integrated 49.9-ohm terminations on all four MDI pairs drastically reduce the BOM on switch line cards. The industrial-grade -40 C to +85 C rating supports factory-floor deployments. Compared with discrete transformer-and-connector designs, the integrated termination saves roughly four resistors per port, and the GMII interface provides a clean attach to industrial MACs such as Microchip's KSZ8895 switch fabric or third-party SoCs. Designers should follow the datasheet's recommended magnetics list and provide adequate thermal relief via copper pour around the exposed die paddle if applicable.
추천
Embedded Linux Networking on SBCs
Single-board computers, industrial gateways and IoT edge nodes use the KSZ9021GQI to add a GbE port that talks directly to application processors over GMII or MII. The 128-pin PQFP package is hand-solder-friendly and easier to rework than the QFN alternatives, an advantage for low-volume industrial products. The 25 MHz reference clock, single 3.3 V supply, and software-controlled power-down mode integrate well with Linux PHY drivers already in the mainline kernel, enabling rapid bring-up on NXP i.MX, Microchip SAMA5, and Marvell processors. Energy-Efficient Ethernet support reduces idle power to under 100 mW, which is meaningful for battery-backed IoT gateways.
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IP Cameras and Network Video Recorders
Surveillance IP cameras and NVR backbones leverage the KSZ9021GQI to carry multi-stream 1080p/4K H.264 and H.265 video with sub-frame latency. The 1000Base-T bandwidth and PoE-friendly magnetics interface stream bandwidth headroom, while HP Auto-MDIX lets installers use any straight or crossover cable without confusion. The wide -40 C to +85 C industrial temperature range suits outdoor enclosures and IP66 camera housings. Integrated MDC/MDIO management provides link-state and speed-mismatch reporting back to the host SoC, enabling NVR system software to surface per-port error counters and physical-layer warnings.
추천
Factory Automation and PLCs
Programmable Logic Controllers and fieldbus gateways that require determinism and EMC robustness benefit from the KSZ9021GQI's 3.3 V single-supply operation, integrated LDO regulators, and proven PHY performance over CAT-5 in noisy industrial cabinets. Its -40 C to +85 C operating envelope enables factory-floor and outdoor cabinet mounting, and its MDC/MDIO register set exposes cable diagnostics such as cable length and pair skew through the standard PHY register interface. PROFINET, EtherCAT and EtherNet/IP stacks (commonly run on external microcontrollers) can rely on the same Auto-Negotiation and pause-frame behavior. Hardware engineers should follow the PCB layout checklist in the datasheet to maintain 100 m CAT-5 link integrity even when adjacent to motor drives.
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Telecommunications Line Cards
Telecom line cards that deliver Ethernet services to small cells, microwave backhaul and DSL gateway aggregation use the KSZ9021GQI to provide flexible GMII/MII connectivity to Layer 2 processors and FPGAs. Where telecom cards demand very precise clocking and 1000 Mbps line-rate throughput, the KSZ9021GQI's clean GMII bus and known 25 MHz reference-clock tolerance map well to the synchronization requirements of 4G/LTE small-cell backhaul. The 128-PQFP package also eases rework and field-replacement compared with QFN footprints in legacy telecom platforms. Designers should review the datasheet's hardware-design checklist for proper MDI layout and ground partitioning between analog and digital sections.
추천
Network-Attached Storage and Embedded Servers
Network-attached storage (NAS) and embedded server designs running Linux often wire the KSZ9021GQI between the storage processor (a Marvell, NXP or custom ARM SoC) and the chassis' Ethernet connector set. The 1000Base-T line rate sustains multi-drive read/write bursts, while HP Auto-MDIX lets users connect NAS boxes to upstream switches with any standard cable. Auto-negotiation and full-duplex flow control via pause frames protect against dropped packets when several clients hammer the NAS concurrently. Power dissipation of approximately 400 mW active at 1 Gbps sits within typical NAS thermal budgets without a heatsink.
추천
추천 제품 요약
엔지니어링 참조 데이터: KSZ9021GQI — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | KSZ9021GQ | KSZ9021GQI-TR | KSZ9021RND |
|---|---|---|---|---|
| Package | 128-PQFP (14x20 mm) | 128-PQFP (14x20 mm) - same | 128-PQFP (14x20 mm) - same | 128-PQFP (14x20 mm) - same |
| Brand | Microchip Technology | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same |
| Operating Temperature | -40 C to +85 C (industrial) | 0 C to +70 C (commercial) | -40 C to +85 C (industrial) | -40 C to +85 C (industrial) |
| Supply Voltage | 3.135 V to 3.465 V | 3.135 V to 3.465 V | 3.135 V to 3.465 V | 3.135 V to 3.465 V |
| MAC Interface | GMII, MII | GMII, MII | GMII, MII | GMII, MII |
| Auto-MDIX | Yes | Yes | Yes | Yes |
| EEE Support (802.3az) | Yes | Yes | Yes | Yes |
| Lifecycle | Last-time-buy (EOL June 2026) | Last-time-buy (EOL June 2026) | Last-time-buy (EOL June 2026) | Last-time-buy (EOL June 2026) |
| Param Match | Target | 95% | 100% | 100% |
주요 차별점
- Industrial temperature grade on a 128-PQFP footprint (vs KSZ9021GQ)
- GMII/MII native MAC interface (vs KSZ9031RNX)
- Same 128-PQFP package across all EOL variants (vs KSZ9021GN (64-QFN))
설계 노트
Follow the application circuit in the datasheet exactly: route the four MDI differential pairs (MDIP/N[0] through [3]) as 100-ohm differential microstrip on the top layer over a continuous ground plane, and keep the pairs matched within 5 mm. Place the 49.9 ohm termination resistors at the device side of the magnetics rather than the connector side to minimize return-loss degradation.
The KSZ9021GQI integrates its own 1.2 V LDOs from 3.3 V, so external 3.3 V supply design is the only concern. Use a ferrite bead to isolate digital 3.3 V from analog 3.3 V if the board has noisy digital loads, then bulk-decouple each VDD pin with 10 uF plus a 0.1 uF ceramic placed within 3 mm. Connect all GND pins to a single low-impedance ground plane.
Do not omit the 25 MHz reference clock stabilization components: a 33 ohm series resistor at the XO output plus load capacitors matched to the crystal datasheet prevent frequency drift across temperature. Also confirm the magnetics you choose are rated for 1000Base-T and conform to the IEEE 802.3 isolation requirement of 1500 Vrms - using 10/100-only magnetics will pass link at lower speeds but fail 1 Gbps.
규정 준수 정보
RoHS and lead-free compliance confirmed by Microchip product page; AEC-Q100 grade is not applicable for PHY transceivers; halogen-free status not explicitly stated in the verified data.
