LTC1605-1IN#PBF - 16-Bit 100ksps SAR ADC | Analog Devices
부품 번호: LTC1605-1IN#PBF ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $89.99 | $89.99 |
| 10 | $80.99 | $809.90 |
| 100 | $71.99 | $7,199.00 |
| 500 | $65.99 | $32,995.00 |
| 1,000 | $60.99 | $60,990.00 |
LTC1605-1IN#PBF 개요
A SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm and an internal capacitive DAC to resolve the input voltage one bit at a time per clock cycle. SAR ADCs occupy the middle ground between delta-sigma (high resolution, low speed) and flash (very high speed, low resolution) architectures. They are the dominant choice for 12-16 bit industrial data-acquisition systems running at 10 ksps to 1 Msps, particularly when deterministic latency and a parallel/serial output are required. The LTC1605-1IN#PBF inherits the lineage of the industry-standard LTC1605 family, all of which share the same 28-pin pinout and timing characteristics for drop-in upgrades.
Key features include 16-bit no-missing-codes performance, 86 dB typical signal-to-noise ratio, a 100 ksps sampling rate, and an external reference option for systems that require better temperature drift than the internal 2.5 V reference provides. The 28-pin PDIP package is through-hole, simplifying prototyping and field replacement for industrial instrumentation.
Typical applications include industrial process control, multi-channel data-acquisition boards, weigh-scale and load-cell digitizers, panel meters, instrumentation front-ends, and bench-top test-and-measurement equipment. The 5 V single-supply operation and parallel data port allow direct connection to legacy parallel-signal processors and modern microcontrollers/DSPs without additional level translation.
When designing with the LTC1605-1IN#PBF, ensure the analog input is buffered if the source impedance exceeds the datasheet-specified value, and decouple VDD with a 10 µF tantalum in parallel with a 0.1 µF ceramic placed within 1 cm of the supply pin. The #PBF suffix indicates lead-free (Pb-free) and RoHS-compliant construction, qualifying the part for modern and export-controlled designs.
드롭인 대체품: LTC1605-1IN#PBF — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: LTC1605-1IN#PBF (동일 폼 팩터 및 풋프린트) — 차이점: Package.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
LTC1605IN#PBF
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
LTC1605-1IN#PBF 최대 정격 & 전기적 특성
| Number of Bits | 16 |
| 샘플링 속도 | 100 ksps |
| Input Channels | 1 |
| Architecture | SAR (Successive Approximation) |
| Input Range (LTC1605-1) | 0 V to 4 V (unipolar) |
| Input Range (LTC1605-2) | ±4 V (bipolar) |
| Supply Voltage (VDD) | 4.75 V to 5.25 V (single 5 V supply) |
| Supply Current (Typ) | 11 mA (55 mW dissipation typ) |
| Power Dissipation (Typ) | 55 mW |
| Data Interface | Parallel (16-bit or 2-byte) |
| Reference | Internal 2.5 V; external option |
| SNR (Typ) | 86 dB |
| 동작 온도 | -40 °C to +85 °C (Industrial) |
| 패키지 | 28-PDIP (N), 0.300 in (7.62 mm) row spacing |
| 실장 유형 | Through-Hole |
| Temperature Grade | Industrial |
| Lead-Free / RoHS | Yes (lead-free, #PBF suffix indicates Pb-free RoHS compliant) |
LTC1605-1IN#PBF 핀 구성
| 핀 1 | VREF — Reference bypass / external reference input (2.5 V typ) |
| 핀 2 | AIN — Analog input (0 V to 4 V for LTC1605-1) |
| 핀 3 | AGND — Analog ground |
| 핀 4 | CS — Chip select (active low) |
| 핀 5 | R/C — Read/Convert control |
| 핀 6 | BUSY — Busy status output (high during conversion) |
| 핀 7 | HBEN — High-byte enable |
| 핀 8 | DGND — Digital ground |
| 핀 9 | D15 (MSB) — Data bit 15 - most significant bit |
| 핀 10 | D14 — Data bit 14 |
| 핀 11 | D13 — Data bit 13 |
| 핀 12 | D12 — Data bit 12 |
| 핀 13 | D11 — Data bit 11 |
| 핀 14 | D10 — Data bit 10 |
| 핀 15 | D9 — Data bit 9 |
| 핀 16 | D8 — Data bit 8 |
| 핀 17 | D7 — Data bit 7 |
| 핀 18 | D6 — Data bit 6 |
| 핀 19 | D5 — Data bit 5 |
| 핀 20 | D4 — Data bit 4 |
| 핀 21 | D3 — Data bit 3 |
| 핀 22 | D2 — Data bit 2 |
| 핀 23 | D1 — Data bit 1 |
| 핀 24 | D0 (LSB) — Data bit 0 - least significant bit |
| 핀 25 | NC — Not connected (per datasheet) |
| 핀 26 | VDD — +5 V analog/digital supply |
| 핀 27 | VDD — +5 V analog/digital supply |
| 핀 28 | NC — Not connected (per datasheet) |
일반적인 애플리케이션
LTC1605-1IN#PBF 적합 용도: 6 애플리케이션s: Industrial Process Control & Data Acquisition, Weigh Scales & Load-Cell Digitizers, Panel Meters & Instrumentation Front-Ends, Bench-Top Test & Measurement Equipment, Medical Monitoring & Diagnostic Equipment, Audio Bandwidth Signal Processing (Legacy).
Industrial Process Control & Data Acquisition
The LTC1605-1IN#PBF is well-suited for industrial process-control front-ends and multi-channel data-acquisition boards. Its 100 ksps sampling rate and 16-bit no-missing-codes performance give ample bandwidth for closed-loop control loops (typically 1-10 kHz bandwidth) and PLC analog-input modules digitizing 4-20 mA current-loop signals. The single 5 V supply simplifies power-tree design, while the 28-PDIP through-hole package supports legacy backplanes and field-replaceable modules. Compared with delta-sigma ADCs, the deterministic SAR conversion time makes timing easier to synchronize with multiplexer channel switching. Designers should place a unity-gain buffer (such as the LTC1052) ahead of the analog input if the source impedance exceeds the datasheet-specified value.
추천
Weigh Scales & Load-Cell Digitizers
Weigh-scale and load-cell signal chains benefit from the LTC1605-1IN#PBF's 86 dB SNR and 16-bit resolution. A typical design drives the load-cell bridge through an instrumentation amplifier (e.g., AD620) into the 0-4 V unipolar input of the ADC, where 16-bit resolution over 4 V full scale gives a theoretical LSB of 61 µV - sufficient for precision scales down to 0.01 % accuracy. The SAR architecture's single-shot conversion gives clean integration of AC-excited bridge signals, and the parallel output interfaces directly to panel-meter microcontrollers. Internal reference simplifies BOM, while the industrial -40 °C to +85 °C range supports outdoor weighing stations and harsh factory floors.
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Panel Meters & Instrumentation Front-Ends
The LTC1605-1IN#PBF serves well in digital panel meters, multimeter front-ends, and bench-top instrumentation where its 16-bit resolution provides 4-1/2 digit display capability. The parallel 16-bit/2-byte output allows direct bus-attach to legacy microprocessor or microcontroller panels without serial-protocol overhead, reducing display-update latency. The 5 V single-supply operation aligns with common logic families, and the unipolar 0-4 V input matches voltage-mode panel-meter signal conditioning. The DIP package supports prototyping and field serviceability. Compared with integrating ADCs used in older meters, this SAR converter offers higher throughput and shorter acquisition time, supporting faster autoranging and more responsive readouts.
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Bench-Top Test & Measurement Equipment
Bench-top test equipment - including data loggers, waveform capture front-ends, and signal-source read-back circuits - benefits from the LTC1605-1IN#PBF's 100 ksps rate, 16-bit linearity, and parallel output. The SAR architecture's latency determinism is valuable when the test instrument must correlate digitized samples with trigger events. The 28-PDIP package and through-hole mounting simplify test-bench wiring and field upgrade. Designers can route the parallel output to a CPLD or low-cost FPGA for custom data formatting, then send frames to a PC over USB. The internal 2.5 V reference is adequate for general-purpose measurements; an external 5 ppm/°C reference can be substituted when measurement stability over temperature is critical.
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Medical Monitoring & Diagnostic Equipment
Medical monitoring front-ends such as patient monitors, diagnostic imaging digitizers, and laboratory analyzers can use the LTC1605-1IN#PBF as a 16-bit, 100 ksps SAR front-end. Its 86 dB SNR translates to roughly 14 effective bits, sufficient for many physiological-signal channels (ECG, temperature, pulse oximetry) after analog front-end gain. The single 5 V supply simplifies medical-isolation barrier design, and the SAR architecture provides deterministic per-sample latency useful for synchronous multi-channel physiological recording. Designers must ensure IEC 60601 patient-leakage and isolation requirements are met by upstream components; the ADC itself is not a patient-contact element. The industrial -40 °C to +85 °C temperature range covers most clinical environments.
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Audio Bandwidth Signal Processing (Legacy)
While not optimized for audio, the LTC1605-1IN#PBF's 100 ksps sampling rate comfortably covers 20 Hz to 40 kHz audio bandwidth, and its 16-bit/86 dB SNR is comparable to CD-quality audio. Legacy audio-test fixtures and acoustic measurement instruments (such as sound-level meters and noise-dosimeter front-ends) can leverage the SAR architecture's deterministic conversion time for triggered captures. The parallel output interfaces directly to legacy DSPs and audio processors. Compared with delta-sigma audio ADCs, the LTC1605-1IN#PBF lacks integrated anti-aliasing filters and decimation, requiring external analog filter design but offering lower latency. The unipolar 0-4 V input pairs well with audio op-amp output stages biased at mid-scale.
추천
추천 제품 요약
엔지니어링 참조 데이터: LTC1605-1IN#PBF — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | LTC1605IN#PBF | LTC1605-1CG#PBF | LTC1605-1IG#PBF |
|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 28-PDIP (N) through-hole | 28-PDIP (N) - same | 28-SSOP - different | 28-SSOP - different |
| Resolution | 16 bits | 16 bits | 16 bits | 16 bits |
| Sampling Rate | 100 ksps | 100 ksps | 100 ksps | 100 ksps |
| Input Range | 0 V to 4 V (unipolar) | ±10 V (bipolar) | 0 V to 4 V | 0 V to 4 V |
| Architecture | SAR | SAR | SAR | SAR |
| Power Dissipation | 55 mW typical | 55 mW typical | 55 mW typical | 55 mW typical |
| Operating Temperature | -40 °C to +85 °C | -40 °C to +85 °C | 0 °C to +70 °C (commercial) | -40 °C to +85 °C (industrial) |
| Mounting Type | Through-Hole (PDIP) | Through-Hole (PDIP) | Surface-Mount (SSOP) | Surface-Mount (SSOP) |
주요 차별점
- Complete 16-bit solution with internal reference, S/H, and clock (vs LTC1605IN#PBF (same family, ±10 V bipolar input))
- Through-hole 28-PDIP form factor for prototyping and legacy backplanes (vs LTC1605-1CG#PBF (28-SSOP) and LTC1605-1IG#PBF (28-SSOP))
- Unipolar 0-4 V input optimized for single-supply signal chains (vs LTC1605IN#PBF (±10 V bipolar input))
설계 노트
Estimated: The LTC1605-1IN#PBF draws about 11 mA from a single 5 V supply (55 mW / 5 V). Place a 10 µF tantalum (or low-ESR ceramic) bulk decoupling capacitor and a 0.1 µF ceramic HF-decoupling capacitor within 1 cm of the VDD pins (26 and 27) to keep digital switching noise out of the analog supply. AGND and DGND should be joined at a single point near the ADC to avoid ground loops. The analog-input pin (AIN) should be driven from a low-impedance buffer (≤ 1 kΩ source impedance) to settle within the acquisition window.
In a 28-PDIP through-hole layout, route the parallel digital bus traces (D0-D15, CS, R/C, BUSY, HBEN) away from the analog input pin (pin 2) and the reference pin (pin 1). Place a ground plane under the IC body to provide shielding; keep the analog ground return trace short and wide. If your system has digital outputs feeding back near AIN, add a guard ring tied to AGND around the analog input to absorb injected charge. For mixed-signal designs with multiple parallel outputs, gate the digital activity (e.g., during BUSY high) to reduce ground bounce.
Estimated: Common pitfalls with the LTC1605-1IN#PBF include (1) exceeding the datasheet-specified analog input current - clamp transient overvoltages with external diodes to AVDD/AGND, (2) loading the reference pin with more than the datasheet-specified capacitance (typically ≤ 22 µF), (3) reading data without checking BUSY low - conversion may still be in progress, and (4) applying a bipolar input to the LTC1605-1 variant (use LTC1605-2 for ±4 V). The #PBF suffix denotes lead-free / RoHS compliant, so use NiPdAu-compatible sockets if you plan rework on legacy SnPb systems.
The LTC1605-1IN#PBF's SAR architecture samples the input capacitor for ~1 µs at the start of each conversion. To avoid gain errors and crosstalk in multiplexed applications, allow at least the datasheet-specified acquisition time after switching the analog multiplexer. When reading the parallel bus at high speed, terminate the bus with 33 Ω series resistors near the ADC to damp reflections. The BUSY signal goes high during conversion; synchronize external read cycles to the BUSY falling edge for minimum timing jitter.
규정 준수 정보
RoHS compliant per the #PBF suffix in the part number (Pb-free construction). REACH compliant per Analog Devices product policy. AEC-Q100 not applicable (industrial-grade ADC, not automotive-qualified). Conflict-minerals statement available from Analog Devices. Halogen-free status not explicitly stated in available data.
