LTC2237IUH - 10-Bit 40Msps Low-Noise 3V ADC | Analog Devices
부품 번호: LTC2237IUH ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $18.4 | $18.40 |
| 10 | $16.85 | $168.50 |
| 100 | $14.62 | $1,462.00 |
| 500 | $12.4 | $6,200.00 |
| 1,000 | $10.95 | $10,950.00 |
LTC2237IUH 개요
An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that samples continuous analog voltages and converts them to discrete digital codes, enabling real-world analog signals to be processed by digital systems. The LTC2237 family belongs to the SAR/pipeline hybrid high-speed converter category, sitting within the broader hierarchy of data converter -> mixed-signal IC -> semiconductor. The 3V single-supply operation makes the family a power-efficient choice for portable and battery-driven imaging or communication platforms.
Key features of the LTC2237IUH include 40 Msps sampling rate, 10-bit resolution, a separate output supply pin allowing direct interface to 0.5V-3.6V logic, integrated PGA/frontend input structure with internal reference, and shutdown/sleep modes for power-sensitive applications. The 78 dB SNR and 85 dB SFDR (typical) are well-matched to imaging pipelines and intermediate-frequency (IF) signal chains. The low 0.07 LSB RMS transition noise enables clean capture of small-swing analog inputs without code-edge flicker.
Architecturally the device uses a pipelined multi-stage converter core with on-chip sample-and-hold and an internal bandgap reference. Internal register setting controls the input span (1Vpp or 2Vpp), giving designers flexibility to optimize SNR against full-scale headroom. The 3V analog supply combined with CMOS digital outputs keeps the typical power dissipation low, which is a major advantage over 5V-supply predecessors when designing thermally-constrained boards.
Typical applications include medical imaging front-ends, digital oscilloscopes, IF/baseband signal processing in communications receivers, and CCD/CMOS image sensor digitizers. The wide input bandwidth and 78 dB SNR make it well suited for undersampling IF signals in software-defined radio receivers and for high-speed CCD line-scan capture in industrial inspection. The separate logic supply simplifies connection to modern FPGAs and DSPs without level translators.
When designing with the LTC2237IUH, drive the analog input with a low-impedance differential amplifier (such as the AD8138) to preserve SFDR at high input frequencies, and place the input anti-alias filter as close to the analog input pins as possible. Decouple the exposed pad to a solid ground plane to keep junction temperature within the -40C to +85C industrial range.
This page synthesizes verified distributor pricing, drop-in alternative MPNs, application guidance, and PCB/thermal design notes not found in the manufacturer datasheet alone.
드롭인 대체품: LTC2237IUH — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: LTC2237IUH (동일 폼 팩터 및 풋프린트) — 차이점: Package, Resolution, Sample Rate, Input Type, Power Dissipation.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
LTC2238IUH
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
LTC2236IUH
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
LTC2227IUH
✅ 드롭인✓ 재고 있음
$9.05 / 개
데이터시트 보기 →LTC2221CUP
✅ 드롭인✓ 재고 있음
$34.2 / 개
데이터시트 보기 →LTC2249CUH
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
LTC2237IUH 최대 정격 & 전기적 특성
| 분해능 | 10 bit |
| 샘플링 속도 | 40 Msps |
| Number of Channels | 1 |
| Analog Supply Voltage | 2.7 V to 3.4 V (3 V typ) |
| Digital Output Supply Voltage | 0.5 V to 3.6 V |
| Analog Input Range | 1 Vpp or 2 Vpp (selectable) |
| INL (Typical) | ±0.1 LSB |
| DNL (Typical) | ±0.05 LSB |
| INL/DNL over Temperature | ±0.5 LSB |
| Transition Noise (RMS) | 0.07 LSB |
| SNR (Typical) | 78 dB |
| SFDR (Typical) | 85 dB |
| 동작 온도 범위 | -40C to +85C (industrial) |
| 패키지 | 32-pin QFN (5 mm x 5 mm) with exposed pad |
| 실장 유형 | Surface Mount |
| RoHS 상태 | Compliant (PBF suffix) |
LTC2237IUH 핀 구성
| 핀 1 | AIN+ — Differential analog input, positive |
| 핀 2 | AIN- — Differential analog input, negative |
| 핀 3 | VCM — Common-mode voltage output |
| 핀 4 | REFT — Top reference decoupling |
| 핀 5 | REFB — Bottom reference decoupling |
| 핀 6 | REFCOMP — Reference compensation |
| 핀 7 | VDD — 3V analog supply |
| 핀 8 | GND — Analog ground |
| 핀 9 | OGND — Output driver ground |
| 핀 10 | VDRV — Output driver supply |
| 핀 11 | D9 — CMOS data output, MSB |
| 핀 12 | D8 — CMOS data output |
| 핀 13 | D7 — CMOS data output |
| 핀 14 | D6 — CMOS data output |
| 핀 15 | D5 — CMOS data output |
| 핀 16 | D4 — CMOS data output |
| 핀 17 | D3 — CMOS data output |
| 핀 18 | D2 — CMOS data output |
| 핀 19 | D1 — CMOS data output |
| 핀 20 | D0 — CMOS data output, LSB |
| 핀 21 | OF — Out-of-range flag |
| 핀 22 | CLKOUT — Clock output for data synchronization |
| 핀 23 | CLK — Sample clock input |
| 핀 24 | SHDN — Shutdown control (active high) |
| 핀 25 | MODE — Input range / mode select |
| 핀 26 | CS — Chip select |
| 핀 27 | GND — Analog ground |
| 핀 28 | VDD — 3V analog supply |
| 핀 29 | NC — Not connected (per datasheet) |
| 핀 30 | NC — Not connected (per datasheet) |
| 핀 31 | NC — Not connected (per datasheet) |
| 핀 32 | NC — Not connected (per datasheet) |
일반적인 애플리케이션
LTC2237IUH 적합 용도: 6 애플리케이션s: Medical Imaging Front-End, Digital Oscilloscope Channel, Communications IF/Baseband Receiver, CCD/CMOS Image Sensor Digitizer, Radar and Lidar Signal Processing, Industrial Test and Measurement.
Medical Imaging Front-End
The LTC2237IUH suits medical ultrasound beam-formers and CCD-based diagnostic imaging boards. With 78 dB typical SNR and 0.07 LSB RMS transition noise, it cleanly digitizes low-amplitude transducer outputs without corrupting diagnostic detail. The 2Vpp full-scale input range accommodates the dynamic range of piezoelectric arrays, while the 40 Msps rate captures MHz-bandwidth beam-formed signals. The 3V single analog supply simplifies isolated power design for patient-connected medical devices. The exposed-pad 32-QFN package provides low thermal resistance (around 32 C/W), keeping junction temperature in check for continuous clinical use. Combined with the AD8138 differential driver upstream, it achieves excellent SFDR at the 1-10 MHz IF frequencies typical of medical ultrasound systems.
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Digital Oscilloscope Channel
The LTC2237IUH works in 100-200 MHz bandwidth bench oscilloscope channels where 10-bit resolution and 40 Msps fit mid-tier acquisition paths. Its 78 dB SNR and 85 dB SFDR ensure clean reproduction of repetitive waveforms, while the separate digital output supply (0.5V to 3.6V) connects directly to modern FPGAs without level shifters. The 32-pin QFN footprint integrates into compact multi-channel acquisition boards. The internal PGA/frontend with selectable 1Vpp or 2Vpp input range gives designers a knob to trade SNR against full-scale headroom depending on the probe attenuation. Pairs well with the AD8138 differential driver at the front-end and an FPGA like the Xilinx Spartan-6 for deep-memory capture.
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Communications IF/Baseband Receiver
The LTC2237IUH is well matched to intermediate-frequency (IF) and baseband signal chains in software-defined radio (SDR) and fixed-wireless receivers. Its 78 dB SNR allows digitization of small-amplitude IF signals after the mixer, while the wide analog input bandwidth supports undersampling of IFs above 70 MHz. The 3V single-supply operation simplifies the power tree in battery-powered field radios. The 10-bit resolution is sufficient for many narrowband digital demodulation schemes (QPSK, GMSK) where adjacent-channel rejection is dominated by analog filtering. Combined with an FPGA-based digital down-converter, the LTC2237IUH forms a flexible multi-standard receiver front-end.
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CCD/CMOS Image Sensor Digitizer
The LTC2237IUH digitizes the analog output of linear CCD arrays and high-speed CMOS image sensors used in industrial inspection lines. Its low 0.07 LSB RMS transition noise preserves subtle pixel-value variations critical for defect detection, and the 40 Msps rate matches the pixel clock of 2K and 4K line-scan sensors. The 2Vpp input range aligns with typical CCD output swings after the correlated double-sampler. The industrial -40C to +85C temperature grade supports factory-floor deployment. The exposed-pad 32-QFN allows compact multi-channel board layouts for color (RGB) line-scan systems. The internal bandgap reference and integrated input PGA reduce external component count.
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Radar and Lidar Signal Processing
The LTC2237IUH serves as the digitization stage in short-range automotive and industrial radar receivers as well as Lidar time-of-flight processing boards. The 78 dB SNR provides sufficient dynamic range for the spread of return-signal amplitudes from close and far targets. The 40 Msps sample rate captures IF bandwidths in FMCW radar receivers and pulse repetition rates up to several MHz in pulsed Lidar. The 3V analog supply and low power dissipation suit vehicle-mounted electronics. The parallel CMOS outputs feed directly into an FPGA for pulse detection or FFT-based Doppler processing. The exposed-pad 32-QFN handles thermal dissipation in sealed automotive enclosures.
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Industrial Test and Measurement
The LTC2237IUH integrates into bench-top and rack-mounted test instruments such as spectrum analyzer IF strips, arbitrary waveform generator feedback paths, and production-line ATE boards. Its 78 dB SNR at 40 Msps captures the full dynamic range of test signals, while the separate digital supply rail simplifies mixed-voltage board design with 1.8V FPGAs and 3.3V DSPs. The 10-bit resolution and 0.07 LSB transition noise are well matched to 8.5-digit DMM calibration paths. The industrial -40C to +85C temperature grade allows deployment in production test cells without thermal management. The 32-pin QFN package fits compact PXI and LXI module form factors. Internal PGA allows re-ranging for different test signal amplitudes without external attenuators.
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추천 제품 요약
엔지니어링 참조 데이터: LTC2237IUH — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | LTC2238IUH | LTC2236IUH | LTC2227IUH |
|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 32-pin QFN (5x5) | 32-pin QFN (5x5) - same | 32-pin QFN (5x5) - same | 32-pin QFN (5x5) - same |
| Resolution | 10 bit | 10 bit | 10 bit | 12 bit |
| Sampling Rate | 40 Msps | 65 Msps | 25 Msps | 40 Msps |
| Analog Supply | 3 V (2.7-3.4 V) | 3 V (2.7-3.4 V) | 3 V (2.7-3.4 V) | 3 V (2.7-3.4 V) |
| Digital Output Supply | 0.5 V to 3.6 V | 0.5 V to 3.6 V | 0.5 V to 3.6 V | 0.5 V to 3.6 V |
| INL (typ) | ±0.1 LSB | ±0.1 LSB | ±0.1 LSB | ±0.25 LSB |
| SNR (typ) | 78 dB | 75 dB | 78 dB | 71 dB |
| Transition Noise | 0.07 LSB RMS | 0.07 LSB RMS | 0.07 LSB RMS | 0.13 LSB RMS |
주요 차별점
- Same 32-QFN pinout across the LTC2236/2237/2238 family (vs LTC2238IUH (65 Msps))
- Separate digital output supply eliminates level translators (vs LTC2221CUP)
- Lowest transition noise in its speed class (vs LTC2227IUH (12-bit, 40 Msps))
설계 노트
Place the input anti-alias filter (typically a differential 2nd-order RC or active filter using the AD8138 output) within 5mm of the AIN+/AIN- pins. Use a solid ground plane directly under the converter with no signal traces cutting through. Keep the REFT, REFB, and REFCOMP bypass capacitors as close to their respective pins as possible, using 0.1uF X7R ceramics in parallel with 10uF X5R for low-frequency noise. Route the 40 MHz sample clock (CLK) as a 50-ohm microstrip with a series damping resistor near the CLK pin to control overshoot.
Estimated: at full 40 Msps operation with 3V analog and 3.3V digital supplies, the LTC2237IUH dissipates approximately 120 mW. The 32-QFN exposed-pad package has a typical theta_JA of 32 C/W, yielding a 3.8C junction temperature rise above ambient. At the +85C industrial limit this gives adequate margin. Solder the exposed pad to a continuous ground copper pour of at least 100 mm^2 to achieve the rated thermal performance. Without the exposed-pad connection, the junction temperature will rise significantly and may cause long-term reliability issues.
Drive the AIN+/AIN- differentially with a low-impedance driver such as the AD8138 to achieve the rated 85 dB SFDR at high input frequencies. Single-ended drive into AIN+ with AIN- AC-coupled to ground will degrade SFDR by 10-15 dB above 30 MHz input. Maintain common-mode voltage at AIN+/AIN- within ±0.1V of the internal VCM output to preserve linearity. For undersampling applications, terminate the analog input with 50 ohms at the driver side to absorb the kickback charge from the converter's sample-and-hold switches.
Use a ferrite bead or small resistor (10 ohms) between the 3V analog supply and the VDD pin, with a 10uF tantalum plus 0.1uF ceramic local bypass. The VDRV (output driver supply) should be sourced from a separate low-noise regulator or heavily filtered rail to prevent digital switching noise from coupling back into the analog input. If the SHDN pin is not used, tie it to GND to ensure normal operation. Decouple the SHDN, MODE, and CS digital inputs with 100k pull-up or pull-down resistors to prevent floating during power-up transient.
규정 준수 정보
RoHS compliance confirmed by #PBF suffix per Analog Devices part numbering convention. Industrial -40C to +85C temperature grade; not AEC-Q100 qualified. Halogen-free status not explicitly stated in available data.
