MAX4865LELT+T - 28V OVP Controller w/ Rev Polarity | Analog Devices
부품 번호: MAX4865LELT+T ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $1.75 | $1.75 |
| 10 | $1.58 | $15.80 |
| 100 | $1.42 | $142.00 |
| 500 | $1.27 | $635.00 |
| 1,000 | $1.1 | $1,100.00 |
MAX4865LELT+T 개요
An OVP controller is a power-management IC that monitors a supply rail and disconnects downstream circuitry when the input voltage exceeds a programmed threshold. It sits between a connector/barrel jack and the system load in the system-power tree and is one tier above simple TVS diodes and PTC fuses because it offers a resettable, configurable electronic trip. Within the broader hierarchy, the MAX4865L belongs to the power-management IC family of specialized protection controllers, alongside ideal-diode OR controllers, hot-swap controllers, and eFuse ICs.
The MAX4865L employs a precision bandgap reference plus internal charge pump to bias the gate of an external N-channel MOSFET in normal operation (turning it on for low-loss power-path conduction) and rapidly pulling the gate to ground when an OVP event is detected, isolating the load in microseconds. The integrated reverse-polarity block uses the same MOSFET in conjunction with a companion P-channel device to block negative input voltages down to -28 V without allowing destructive current flow.
Typical applications include USB-C /USB-PD VBUS protection at the connector, 12 V automotive accessory rails, lithium-ion battery charger input protection, and hot-plug rails in servers and SSDs. Designers choose this part when they need a small-footprint, low-Iq solution that survives accidental exposure to industrial line voltages or reverse-battery hookups in fielded equipment.
When designing with this part, place the external MOSFET within 10 mm of the IC to keep the gate-drive loop short and minimize dv/dt-induced false triggering. The 50 ms startup blanking time avoids spurious trips during system ramp; do not place bulk capacitance downstream of the switch MOSFET larger than the value the datasheet allows, or inrush can re-trigger OVP after the blanking window expires.
This page synthesizes distributor pricing, parametric same-package alternatives, and practical design notes that supplement what is in the manufacturer datasheet.
드롭인 대체품: MAX4865LELT+T — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
MAX4864LELT+T
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
MAX4866LELT+T
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
MAX4867LELT+T
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
MAX4865EELT+T
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
MAX4865LELT+T 사양
| 기능 | Overvoltage protection controller with reverse-polarity protection |
| Input Voltage Protection (forward) | Up to +28 V |
| Input Voltage Protection (reverse) | Down to -28 V |
| OVP Trip Variants Available | 7.4 V, 6.35 V, 5.8 V, 4.65 V |
| External MOSFET Drive | Low-cost complementary N-MOSFET (and optional P-MOSFET for reverse block) |
| Internal Startup Delay | 50 ms |
| Standby Current (UVLO mode) | 8.5 µA |
| 셧다운 전류 | 0.4 µA |
| FLAG Output | Open-drain overvoltage fault indicator |
| Internal Charge Pump | Yes |
| 패키지 | 6-pin µDFN (2 mm x 2 mm) |
| 동작 온도 | -40 °C to +85 °C |
| 실장 유형 | Surface Mount |
| RoHS 상태 | Compliant |
MAX4865LELT+T 핀 구성
| 핀 1 | GND — Ground reference |
| 핀 2 | IN — Input voltage sense (to internal OVP comparator and reverse-polarity detector) |
| 핀 3 | GATE — Gate drive output for external N-channel MOSFET (charge-pump biased) |
| 핀 4 | FLAG — Open-drain fault indicator (low during OVP event) |
| 핀 5 | EN/SHDN — Enable / shutdown input (logic high enables the controller) |
| 핀 6 | OUT — Output to downstream system / drives external MOSFET source connection (returns to protect the load side) |
일반적인 애플리케이션
MAX4865LELT+T 적합 용도: 6 애플리케이션s: USB-C / USB-PD VBUS Protection, Automotive 12 V Accessory Rail Protection, Lithium-Ion Battery Charger Input Protection, Hot-Plug Server / SSD Rail Protection, Industrial Sensor / PLC Input Protection, Portable Power Bank / Battery Pack Input Protection.
USB-C / USB-PD VBUS Protection
USB-C and USB-PD sink ports are exposed to 5 V, 9 V, 15 V, and 20 V VBUS levels from chargers and cables that may be miswired. The MAX4865LELT+T's +28 V forward tolerance covers the full 20 V PD level with substantial headroom for hot-plug overshoot, while the -28 V reverse rating stops accidental reverse-polarity faults. With 8.5 µA standby current and the 6-pin µDFN footprint, it fits inside a Type-C connector shroud or a small dongle PCB. The internal 50 ms blanking delay avoids nuisance tripping during the USB-C attach debounce, and the open-drain FLAG output can interrupt the PD controller via a GPIO if a sustained fault occurs.
추천
Automotive 12 V Accessory Rail Protection
Aftermarket infotainment units, dashcams, and OBD-II dongles sit on a 12 V battery rail that can swing to 24 V during a jump-start and to negative voltages during reverse battery hookup. The MAX4865LELT+T provides ±28 V bidirectional protection by steering one N-channel and one P-channel MOSFET in concert with its internal charge pump. Its 50 ms startup delay tolerates the cranking inrush profile of large downstream capacitors. Designers wire the FLAG pin back to the host MCU so an overvoltage event lights a fault LED and latches a diagnostic code. The 6-pin µDFN package leaves room for passive protection components around the connector in tight automotive housings.
추천
Lithium-Ion Battery Charger Input Protection
Field-charged Li-ion packs and portable power stations routinely encounter faulted adapters, misrated solar panels, or shorted USB cable shields. The MAX4865LELT+T serves as the first line of defense upstream of the charger IC, breaking the path on overvoltage events up to +28 V and isolating the pack on reverse polarity. The 0.4 µA shutdown current is negligible compared to typical pack self-discharge of a few hundred microamps. The 6-pin µDFN's exposed pad provides a low thermal resistance path so the IC can sit inside a sealed handheld enclosure. Use the FLAG output to drive an external MOSFET that hard-disables the charger IC's EN pin during sustained faults.
추천
Hot-Plug Server / SSD Rail Protection
Hot-swap bays in datacenters and removable SSDs face inrush during insertion, transients from backplane faults, and field-service miswiring. The MAX4865LELT+T's integrated gate-drive charge pump controls the hot-swap FET with only 8.5 µA idle - critical for always-on backplanes - and its 50 ms startup blanking absorbs the capacitive inrush of large downstream filters. The 6-pin µDFN footprint is convenient when the backplane is dense and the protection circuitry must be co-located with the connector. The ±28 V window is comfortable for -48 V telecom-derived shelves through adequate upstream protection. Trip at one of the four preset levels lets the designer pick the optimal threshold for 3.3 V, 5 V, or 12 V rails.
추천
Industrial Sensor / PLC Input Protection
Industrial 24 V sensor rails and PLC inputs routinely see field wiring errors, motor back-EMF transients, and accidental contact with 120/240 V mains. A 24 V PLC input often feeds through a PTC or TVS for the first stage, then through a protection FET gated by the MAX4865LELT+T to break the path on any fault above the ~6.35 V preset. Its -28 V rating guards against miswired field returns that reverse-polarity the entire input. The 6.35 V trip (for the L variant) is well-matched to a 24 V nominal system with a 30% headroom margin. Inside a small DIN-rail module, the 6-pin µDFN package saves critical board area.
추천
Portable Power Bank / Battery Pack Input Protection
Compact USB power banks and battery packs rely on USB-C, barrel jacks, and wireless-pickup inputs that can be misrated by off-brand chargers. The MAX4865LELT+T protects the pack's charge controller IC from overvoltage surges up to +28 V while drawing only 8.5 µA standby - small compared to the milliamp-range quiescent draw of typical gauge/charger ICs. During a sustained fault the open-drain FLAG pin signals the host MCU to blank the LED indicator and lock the pack. The 0.4 µA full shutdown current allows microcontroller-driven sleep modes that preserve battery capacity for months. The 2 mm × 2 mm µDFN package fits within even the smallest 18650-derived pack housings.
추천
추천 제품 요약
엔지니어링 참조 데이터: MAX4865LELT+T — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | MAX4864LELT+T | MAX4866LELT+T | MAX4867LELT+T |
|---|---|---|---|---|
| Brand | Analog Devices (formerly Maxim Integrated) | Analog Devices | Analog Devices | Analog Devices |
| Package | 6-pin µDFN (2x2 mm) | 6-pin µDFN (2x2 mm) - identical | 6-pin µDFN (2x2 mm) - identical | 6-pin µDFN (2x2 mm) - identical |
| Function | OVP controller + reverse-polarity protection | OVP controller + reverse-polarity protection | OVP controller + reverse-polarity protection | OVP controller + reverse-polarity protection |
| Forward Protection Voltage | +28 V | +28 V | +28 V | +28 V |
| Reverse Protection Voltage | -28 V | -28 V | -28 V | -28 V |
| Internal Startup Delay | 50 ms | 50 ms | 50 ms | 50 ms |
| Standby Current (UVLO) | 8.5 µA | 8.5 µA | 8.5 µA | 8.5 µA |
| Shutdown Current | 0.4 µA | 0.4 µA | 0.4 µA | 0.4 µA |
| FLAG Output | Open-drain fault indicator | Open-drain fault indicator | Open-drain fault indicator | Open-drain fault indicator |
주요 차별점
- Bidirectional ±28 V protection in a single IC (vs TPS25200)
- Lowest standby quiescent current in its class (vs MAX4864LELT+T)
- Preset OVP trip levels for tight threshold selection (vs MAX4867LELT+T)
설계 노트
Place the external N-channel MOSFET within 10 mm of the IC's GATE pin and OUT pin so the gate-drive loop remains short. A long gate trace picks up dv/dt from the input rail and can cause false triggering of the OVP comparator or unexpected gate-oscillation. Use a ground pour under the IC and stitch vias around the µDFN's exposed pad to keep thermal resistance below the datasheet's typical 100 °C/W number. Keep all input/output capacitors as close to the protection FET as practical.
Do not place bulk capacitance downstream of the protection MOSFET larger than the datasheet inrush limit allows (typically tens of µF depending on the FET's Rds(on)). The MAX4865LELT+T has a 50 ms startup blanking delay that prevents nuisance tripping during normal turn-on, but excessive bulk capacitance can still cause inrush to re-trigger OVP after the blanking window expires. If a large bulk cap is unavoidable, add an inrush-limiting soft-start resistor or split capacitance across upstream/downstream of the switch.
Although the MAX4865LELT+T draws only 8.5 µA in normal operation, during an overvoltage fault the internal charge pump activates and the IC dissipates additional power proportional to GATE current. Size the copper pour under the µDFN's exposed pad to at least 10 mm² of 1 oz copper to keep Tj rise minimal during sustained faults; derate the protection FET to handle worst-case surge dissipation rather than the IC. The IC itself stays well below thermal limits but the system power stage does not.
Route the FLAG pin trace away from the GATE drive trace and AC input switching nodes to avoid capacitive coupling from the gate-driver transitions. Add a 100 kΩ pull-up resistor on FLAG to a clean logic rail (typically 3.3 V or 5 V) close to the host MCU. If the host is absent, leave FLAG unconnected or pull it up to an always-on rail. Place a small RC filter (100 kΩ + 100 pF) on FLAG if noisy long-cable harnesses are present.
규정 준수 정보
RoHS/REACH compliance and lead-free packaging per Maxim/Analog Devices product page. AEC-Q100 qualification is not explicitly stated in the verified data; this part is recommended for industrial/consumer applications. For automotive-grade applications choose an AEC-Q100-graded variant.
