PIC18F25Q10-I/ML - 8-bit 64MHz MCU, 32KB Flash, 28-QFN | Microchip
부품 번호: PIC18F25Q10-I/ML ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $2.85 | $2.85 |
| 10 | $2.57 | $25.70 |
| 100 | $2.28 | $228.00 |
| 500 | $2.04 | $1,020.00 |
| 1,000 | $1.82 | $1,820.00 |
PIC18F25Q10-I/ML 개요
An 8-bit microcontroller (MCU) is a small computer-on-a-chip built around an 8-bit data path and a Harvard architecture, separating program and data buses for deterministic instruction fetch. The PIC18-Q10 family sits inside the PIC18 high-performance tier, which belongs to the PIC microcontroller family, then the broader 8-bit MCU category, then the microcontroller hierarchy, and ultimately the embedded processor taxonomy. These MCUs combine deterministic interrupt response, on-chip configurable logic, and analog to form compact, low-power control nodes that replace larger discrete designs.
Key differentiating features include 32KB of high-endurance Flash program memory, 2KB SRAM, 256B EEPROM, a 10-bit ADC with computation (ADC2) that offloads averaging and threshold detection from the CPU, a 5-bit DAC, comparators, multiple PWM channels, and a CLC block for glue-logic replacement. The device exposes up to 25 I/O pins, supports I2C/SPI/UART, and uses Microchip's eXtreme Low Power (XLP) technology for energy-sensitive applications.
Architecturally the PIC18F25Q10-I/ML uses Microchip's enhanced mid-range core with a modified Harvard bus and 16-bit instruction word, paired with a 31-level hardware stack and hardware multiply. The CWG block synthesizes complementary PWM patterns with dead-band control, enabling direct drive of half-bridge power stages, while the CLC cells implement custom logic without external gates.
Typical applications include industrial sensor nodes, low-cost brushed and BLDC motor control, LED lighting drivers, home appliances, HVAC controls, and 5V noise-tolerant sensor interfaces. The 2.3V to 5.5V supply range plus 5V GPIO tolerance make it well suited to factory automation where 24V or 5V buses are common.
When designing with this part, allocate PCB area beneath the exposed pad for thermal relief and ground stitching, because the QFN package draws heat mainly through the pad. Use the MPLAB X IDE with the XC8 compiler and the MPLAB Code Configurator (MCC) plugin to generate peripheral initialization code, pin maps, and CIP configuration, reducing firmware ramp-up time significantly.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet. (407 words)
드롭인 대체품: PIC18F25Q10-I/ML — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: PIC18F25Q10-I/ML (동일 폼 팩터 및 풋프린트) — 차이점: ADC, Operating Temperature, Package, Program Memory (Flash), Comparators.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
PIC18F25Q10T-I/ML
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
PIC18F25Q10-I/STX
✅ 드롭인✓ 재고 있음
$1.58 / 개
데이터시트 보기 →PIC18F26Q10-I/ML
✅ 드롭인✓ 재고 있음
$1.1 / 개
데이터시트 보기 →PIC18F24Q10-I/ML
✅ 드롭인✓ 재고 있음
$1.04 / 개
데이터시트 보기 →PIC18F27Q43-I/ML
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
PIC18F25Q10-I/ML 최대 정격 & 전기적 특성
| Core Architecture | PIC 8-bit enhanced mid-range |
| Family | PIC18-Q10 |
| Program Memory (Flash) | 32 KB (32K x 8) |
| SRAM | 2 KB |
| EEPROM | 256 B |
| Maximum CPU Speed | 64 MHz |
| Supply Voltage (VDD) | 2.3 V to 5.5 V |
| 동작 온도 | -40 C to +85 C (Industrial) |
| I/O Pins | 25 |
| 패키지 | 28-pin QFN (6x6 mm) with exposed pad |
| ADC | 10-bit ADC with computation (ADC2) |
| DAC | 5-bit DAC |
| Comparators | Yes |
| Core Independent Peripherals (CIPs) | CLC, CWG, HLT, WWDT, PWM |
| Communication | I2C / SPI / UART |
| Low-Power Technology | XLP (eXtreme Low Power) |
| 실장 유형 | Surface Mount |
| MSL 레벨 | 1 |
| RoHS 상태 | Compliant |
PIC18F25Q10-I/ML 핀 구성
| 핀 1 | RA0 — Port A bit 0 / analog input |
| 핀 2 | RA1 — Port A bit 1 / analog input |
| 핀 3 | RA2 — Port A bit 2 / analog input |
| 핀 4 | RA3 — Port A bit 3 / analog input |
| 핀 5 | RA4 — Port A bit 4 |
| 핀 6 | RA5 — Port A bit 5 |
| 핀 7 | RA6 — Port A bit 6 |
| 핀 8 | RA7 — Port A bit 7 |
| 핀 9 | VSS — Ground |
| 핀 10 | RB0 — Port B bit 0 |
| 핀 11 | RB1 — Port B bit 1 |
| 핀 12 | RB2 — Port B bit 2 |
| 핀 13 | RB3 — Port B bit 3 |
| 핀 14 | RB4 — Port B bit 4 |
| 핀 15 | RB5 — Port B bit 5 |
| 핀 16 | RB6 — Port B bit 6 / ICSPCLK |
| 핀 17 | RB7 — Port B bit 7 / ICSPDAT |
| 핀 18 | VSS — Ground (secondary) |
| 핀 19 | RC0 — Port C bit 0 |
| 핀 20 | RC1 — Port C bit 1 |
| 핀 21 | RC2 — Port C bit 2 |
| 핀 22 | RC3 — Port C bit 3 |
| 핀 23 | RC4 — Port C bit 4 |
| 핀 24 | RC5 — Port C bit 5 |
| 핀 25 | RC6 — Port C bit 6 |
| 핀 26 | RC7 — Port C bit 7 |
| 핀 27 | VDD — Positive supply voltage |
| 핀 28 | MCLR — Master Clear (reset) input |
일반적인 애플리케이션
PIC18F25Q10-I/ML 적합 용도: 6 애플리케이션s: Industrial 5V Sensor Node, Low-Cost BLDC / Brushed Motor Control, LED Lighting Driver Controller, Home Appliance Control Board, HVAC Sensor and Actuator Interface, Automotive Body Electronics (Non-Safety).
Industrial 5V Sensor Node
The PIC18F25Q10-I/ML fits industrial 5V sensor nodes because its 2.3V-5.5V VDD and 5V-tolerant GPIO allow direct connection to factory-floor 5V rails without level shifters. The 10-bit ADC2 with hardware computation (averaging, threshold, oversampling) offloads sensor linearization from the CPU, and the XLP sleep currents under 50 nA let battery-backed nodes run for years. The 28-QFN (6x6 mm) footprint plus 64 MHz core delivers deterministic 1-wire and I2C sensor acquisition at low BOM cost.
추천
Low-Cost BLDC / Brushed Motor Control
The PIC18F25Q10-I/ML is well suited for low-cost motor control because the Complementary Waveform Generator (CWG) block synthesizes complementary PWM patterns with dead-band control for direct half-bridge drive, eliminating external gate-driver logic. The Hardware Limit Timer (HLT) provides cycle-by-cycle current limiting, and the Configurable Logic Cells (CLC) implement custom commutation sequencing without CPU overhead. At 64 MHz, the core handles back-EMF sensing and closed-loop PI control while the CIPs handle the time-critical switching, fitting 6-step BLDC commutation or brushed DC direction control.
추천
LED Lighting Driver Controller
The PIC18F25Q10-I/ML drives LED lighting controllers because its 5V GPIO can directly switch logic-level MOSFETs or relay drivers, and the PWM modules support up to 16-bit resolution at 5V supply for smooth dimming. The ADC2 block measures LED forward current via shunt resistor with hardware averaging, and the WWDT/CLC blocks implement safety cutoffs (overtemperature, overcurrent) without firmware intervention. The 32 KB Flash stores color-mixing tables and DALI/DMX protocol stacks, and the 28-QFN footprint fits into tight LED fixture enclosures.
추천
Home Appliance Control Board
The PIC18F25Q10-I/ML fits home appliance control boards (washing machines, dishwashers, microwave ovens) because the 5V operation tolerates noisy 5V bus environments common in motor-bearing appliances. The CLC cells replace discrete logic for safety interlocks (door switch, water level), the CWG handles triac-fired heater or universal-motor PWM, and the 25 I/O pins drive multiplexed 7-segment displays, keypads, and buzzer feedback. The industrial -40C to +85C rating survives appliance thermal environments.
추천
HVAC Sensor and Actuator Interface
The PIC18F25Q10-I/ML is well suited for HVAC sensor and actuator interface boards because the 5V-tolerant I2C/SPI/UART can interface with legacy 5V transceivers, and the 10-bit ADC with hardware computation reads multiple thermistor/pressure channels with averaging offloaded to the CIP. The CWG block drives TRIAC gate pulses for AC line-voltage damper actuators with dead-band insertion, while the WWDT provides fail-safe recovery from firmware lockup. The XLP low-power modes let battery-backed thermostats last on a single coin cell for years.
추천
Automotive Body Electronics (Non-Safety)
The PIC18F25Q10-I/ML fits non-safety automotive body electronics (lighting modules, seat controllers, HVAC panels) because the 5V GPIO directly drives logic-level FETs and the ADC2 channels read sensors with hardware noise rejection. Note that this part is NOT AEC-Q100 qualified - for AEC-Q100 grade, choose the PIC18F25Q10-E/ML extended-temperature variant or the Q10-Q1 family. The 28-QFN (6x6 mm) footprint and 64 MHz core suit compact body-control modules where PCB area is tight and firmware needs deterministic interrupt response.
추천
추천 제품 요약
엔지니어링 참조 데이터: PIC18F25Q10-I/ML — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | PIC18F25Q10T-I/ML | PIC18F25Q10-I/STX | PIC18F26Q10-I/ML | PIC18F24Q10-I/ML |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 28-QFN (6x6 mm) | 28-QFN (6x6 mm) - same | 28-VQFN (4x4 mm) - smaller | 28-QFN (6x6 mm) - same | 28-QFN (6x6 mm) - same |
| Flash Memory | 32 KB | 32 KB | 32 KB | 64 KB | 16 KB |
| SRAM | 2 KB | 2 KB | 2 KB | 4 KB | 1 KB |
| EEPROM | 256 B | 256 B | 256 B | 256 B | 256 B |
| Maximum CPU Speed | 64 MHz | 64 MHz | 64 MHz | 64 MHz | 64 MHz |
| Operating Voltage | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V |
| Core Independent Peripherals (CIPs) | CLC, CWG, HLT, WWDT, ADC2 | CLC, CWG, HLT, WWDT, ADC2 | CLC, CWG, HLT, WWDT, ADC2 | CLC, CWG, HLT, WWDT, ADC2 | CLC, CWG, HLT, WWDT, ADC2 |
| I/O Pins | 25 | 25 | 25 | 25 | 25 |
주요 차별점
- 5V GPIO tolerance with 2.3V-5.5V VDD (vs PIC18F27Q43-I/ML)
- Smaller 4x4 mm VQFN variant available (vs PIC18F25Q10-I/STX)
- CIP peripheral density in a 28-pin package (vs PIC18F24Q10-I/ML)
설계 노트
The 28-QFN (6x6 mm) package draws heat primarily through the central exposed pad. Estimated: at 64 MHz CPU clock with all peripherals active, typical IDD is around 8 mA at 5V, giving roughly 40 mW dissipation, well within the package's thermal envelope. For higher-current applications (LED driving, motor control), stitch the exposed pad to a ground pour with at least 8 thermal vias (0.3 mm drill) to keep junction temperature rise below 10 C above ambient.
Place the 0.1 uF VDD decoupling capacitor within 2 mm of the VDD pin and a 1 uF bulk capacitor on the same net. Per Microchip's PIC18 Q10 layout guidelines, separate analog and digital ground returns and join them at a single point under the IC. The exposed pad must be soldered to a copper pad of at least the package's nominal size (approximately 4 mm x 4 mm) to maintain thermal and electrical performance.
Estimated: configure the unused I/O pins as outputs driven low (or as inputs with internal weak pull-ups enabled) before enabling the CWG block, or floating pins can inject noise into the CIP clock tree and cause spurious PWM edges. Also remember that the CLC cells route from the CWG output back to PWM input - misconfiguring the CLC trigger can deadlock the PWM duty cycle. Always re-read the configuration bits after programming via MPLAB X to verify the clock source and watchdog settings.
When using the 10-bit ADC2 in noisy environments (motor drive boards, relay panels), enable the ADC hardware averaging mode and oversampling feature to reject switching noise. Per the PIC18F24/25Q10 datasheet, ADC2 with 4x oversampling achieves effective 12-bit noise performance. Avoid running the ADC at the same time as the CWG switching, or schedule the ADC conversion in a synchronized window after CWG dead-time completes.
규정 준수 정보
Per Microchip product page: RoHS compliant (Pb-free terminations), REACH compliant, halogen-free. Not AEC-Q100 qualified - use PIC18F25Q10-E/ML or PIC18F25Q10T-I/MLVAO for AEC-Q100 grade.