NXP Semiconductors

PN7160A1HN/C100Y - NFC Plug & Play Controller 13.56MHz | NXP

부품 번호: PN7160A1HN-C100Y ✓ 활성
재고 있음 영업일 기준 1~3일 내 발송
1.65 V to 1.95 V Vdss 40-VFQFN Exposed Pad (HVQFN-40, 6 x 6 mm) Package 13.56 MHz Speed
시작가 $2.4 USD / 개
MOQ: 1 |
가격 업데이트: 2026-10-19
볼륨 가격
수량 단가 합계
1 $5.2 $5.20
10 $4.62 $46.20
100 $3.85 $385.00
500 $3.2 $1,600.00
1,000 $2.75 $2,750.00
3,000 $2.4 $7,200.00
ℹ️ 모든 가격은 USD 기준입니다

PN7160A1HN-C100Y 개요

The NXP PN7160A1HN/C100Y is a 13.56 MHz Near Field Communication (NFC) plug-and-play controller with an integrated NCI 2.0 host interface and on-chip firmware, packaged in a 40-pin VFQFN exposed-pad (HVQFN-40, 6x6 mm) form factor. It supports ISO/IEC 14443-A/B, ISO/IEC 15693, FeliCa, MIFARE Classic, MIFARE DESFire, MIFARE Ultralight, and NXP's proprietary NFC-DEP protocols at the air interface, and operates from a 1.65-1.95 V host-side (VDD) supply plus a 3.0-3.6 V NFC front-end (VBAT/VIN) supply over an I2C bus up to 1 MHz. The on-chip firmware handles RF collision resolution, NFC-A/B/F polling loops, and Type 1-5 tag emulation without host CPU involvement, enabling a true drop-in NFC front-end for Linux, Android, Windows, and RTOS systems.

What is an NFC controller? An NFC controller is a contactless front-end IC that manages the 13.56 MHz RF link between a device and a contactless card, phone, or tag, offloading the RF protocol stack, AFE/DCI conditioning, and frame-level error handling from the application processor. Within the broader taxonomy, an NFC controller is a subcategory of RFID reader/transponder ICs, itself a subcategory of wireless connectivity ICs within RF & Wireless semiconductors. NXP's PN71xx family targets high-volume consumer and industrial integration where BOM simplification, certified RF performance, and host-CPU offload are critical.

The PN7160A1HN/C100Y integrates a high-efficiency RF front-end capable of delivering up to 1 W of TX power to an externally tuned antenna while supporting autonomous low-power card detection. Integrated DC-DC converter and LDO blocks minimize external component count; the part needs only a single 3.3 V supply and a tuned 13.56 MHz antenna loop with EMC filter components. Host connectivity is over I2C with a standardized NCI 2.0 command set, so firmware upgrades and protocol additions are delivered as controller firmware updates rather than host driver rewrites.

Typical applications include NFC payment terminals, EMVCo-compliant point-of-sale readers, access control readers, Bluetooth-pairing tap interfaces, IoT provisioning gateways, and industrial identification/logging systems. The PN7161 variant adds Apple Enhanced Contactless Polling (ECP) authorization; the PN7160A1HN/C100Y firmware (C100) does not include ECP and is therefore the default choice for non-Apple-certified designs.

Design tip: route the I2C and IRQ lines away from the antenna loop and keep the antenna matching network within 5 mm of the TVSS pin. Provide a solid ground plane beneath the exposed pad (EP) and stitch it with 4-8 thermal vias for thermal relief - the PN7160 dissipates up to 500 mW during continuous RF transmission.

This page synthesizes distributor pricing, drop-in pin-compatible alternatives (PN7161 family and PN553/C100 variants), and practical design notes not found in the manufacturer datasheet alone.

드롭인 대체품: PN7160A1HN-C100Y — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.

빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:

PN7161A1HN/C100Y

✅ 드롭인
📦 40-VFQFN Exposed Pad (HVQFN-40)
same HVQFN-40 footprint; adds Apple ECP firmware; otherwise pin-to-pin identical

📋 참조 대체품 (카탈로그에 없음)

PN7160A1HN/C100E

✅ 드롭인
📦 40-VFQFN Exposed Pad (HVQFN-40)
same HVQFN-40 footprint; engineering-sample firmware variant; pin-to-pin identical silicon

📋 참조 대체품 (카탈로그에 없음)

PN553

✅ 드롭인 ⚠️ 사양 미검증
📦 40-VFQFN Exposed Pad (HVQFN-40)
same HVQFN-40 footprint; older PN55 family with NCI 1.0 host interface; legacy firmware

📋 참조 대체품 (카탈로그에 없음)

ℹ️ 1 교차 패키지 부품은 숨겨졌습니다 — 다른 패키지는 PCB 재작업이 필요하며 진정한 드롭인 대체품이 아닙니다. 문의하기 교차 패키지 제안이 필요하면 다음을 참조하십시오.

PN7160A1HN-C100Y 사양 (제조사 공개)

기능 NFC Plug & Play Controller with Integrated Firmware and NCI Interface
RF Frequency 13.56 MHz
Supported Protocols ISO/IEC 14443-A/B, ISO/IEC 15693, FeliCa, MIFARE Classic, MIFARE DESFire, MIFARE Ultralight, NFC-DEP
Host Interface I2C (NCI 2.0)
I2C Bus Speed up to 1 MHz
Host Supply Voltage (VDD) 1.65 V to 1.95 V
NFC Supply Voltage (VBAT/VIN) 3.0 V to 3.6 V
TX Output Power up to 1 W (into tuned loop)
패키지 40-VFQFN Exposed Pad (HVQFN-40, 6 x 6 mm)
실장 유형 Surface Mount
습도 민감도 레벨 (MSL) 3
Peak Reflow Temperature 260 C
동작 온도 범위 -30 C to +85 C
Apple ECP Support No (firmware C100 - PN7161 variant supports ECP)
RoHS 상태 Compliant
Firmware Variant C100

PN7160A1HN-C100Y 핀 구성

QFN-40 Package Pinout Diagram QFN-40 6x6mm, P0.5mm, EP 4.1x4.1mm, JEDEC MO-220. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 QFN-40
핀 1 VBAT — NFC front-end supply input (3.0-3.6 V)
핀 2 VIN — DC-DC converter input
핀 3 VCC_TX — Transmitter supply output
핀 4 TX1 — Antenna TX output 1
핀 5 TX2 — Antenna TX output 2
핀 6 RXP — Receiver positive input
핀 7 RXN — Receiver negative input
핀 8 TVSS — Antenna ground reference
핀 9 AUX1 — Auxiliary ADC input 1
핀 10 AUX2 — Auxiliary ADC input 2
핀 11 GND — Ground
핀 12 VDD — Host I/O supply (1.65-1.95 V)
핀 13 SCL — I2C clock (NCI interface)
핀 14 SDA — I2C data (NCI interface)
핀 15 IRQ — Host interrupt (active low)
핀 16 VEN — Host enable (active high)
핀 17 GPIO1 — General-purpose I/O 1
핀 18 GPIO2 — General-purpose I/O 2
핀 19 GPIO3 — General-purpose I/O 3
핀 20 GPIO4 — General-purpose I/O 4
핀 21 GPIO5 — General-purpose I/O 5
핀 22 GPIO6 — General-purpose I/O 6
핀 23 CLK_OUT — Clock output (27.12 MHz reference)
핀 24 XTAL1 — Crystal oscillator input
핀 25 XTAL2 — Crystal oscillator output
핀 26 RESET — Hardware reset (active low)
핀 27 TEST — Test mode (tie to GND in production)
핀 28 NC — Not connected (per datasheet)
핀 29 NC — Not connected (per datasheet)
핀 30 NC — Not connected (per datasheet)
핀 31 NC — Not connected (per datasheet)
핀 32 VOUT_DCDC — DC-DC converter output (to feed VIN)
핀 33 FB_DCDC — DC-DC feedback
핀 34 LX_DCDC — DC-DC switching node
핀 35 PVDD — PLL supply
핀 36 GND — Ground
핀 37 GND — Ground
핀 38 GND — Ground
핀 39 GND — Ground
핀 40 EP — Exposed thermal pad - connect to GND

전력 및 열 특성

전력 입력 1.65 V to 1.95 V
동작 온도 -30 C to +85 C

제조사에서 공개한 PN7160A1HN-C100Y의 전력 입력 및 열 파라미터입니다.

일반적인 애플리케이션

PN7160A1HN-C100Y 적합 용도: 7 애플리케이션s: EMVCo Contactless Payment Terminals, Bluetooth Tap-to-Pair Interfaces, Access Control and Door Reader Systems, Industrial Identification and Asset Tracking, IoT Provisioning and Wi-Fi/BLE Pairing Gateways, Medical Device Identification and Tracking, Automotive In-Cabin NFC Reader.

💳

EMVCo Contactless Payment Terminals

The PN7160A1HN/C100Y fits EMVCo contactless payment terminals because its integrated NCI 2.0 host interface and on-chip firmware offload the entire ISO/IEC 14443 A/B and MIFARE transaction stack from the secure application processor, enabling faster PCI-PTS certification cycles. Operating at 13.56 MHz with up to 1 W TX power, the part supports the 4 cm read-distance envelope required by EMVCo Book D. With a 1.65-1.95 V VDD and 3.0-3.6 V VBAT range, the device pairs directly with a 1.8 V secure MCU without external level shifting, reducing BOM count on cost-sensitive POS hardware.

🎧

Bluetooth Tap-to-Pair Interfaces

The PN7160A1HN/C100Y's low-power autonomous card detection makes it ideal for Bluetooth tap-to-pair reference designs in headphones, speakers, and wearables. The on-chip firmware handles the NFC Forum handover protocol without waking the host MCU, drawing only microamps in standby until a tap is sensed. With a 40-VFQFN exposed-pad package of only 6x6 mm, the controller fits inside cramped wearable enclosures while the 1 W TX headroom accommodates small loop antennas typical of wearable form factors.

🔐

Access Control and Door Reader Systems

Multi-protocol support for ISO/IEC 14443 A/B, ISO/IEC 15693, FeliCa, and MIFARE Classic/DESFire/Ultralight makes the PN7160A1HN/C100Y an excellent front-end for corporate, hospitality, and transit access readers. The integrated DC-DC regulator minimizes the discrete BOM, allowing a complete reader to ship on a 35x35 mm PCB alongside an ESP32 or Cortex-M0 host. The PN7160's -30 C to +85 C operating envelope covers outdoor and semi-outdoor reader installations.

🏭

Industrial Identification and Asset Tracking

Industrial RFID reader applications benefit from the PN7160A1HN/C100Y's high RF output power (up to 1 W) and robust ISO/IEC 15693 support, which delivers the longer read ranges required for warehouse and asset-tracking tags. The I2C interface at up to 1 MHz enables fast tag enumeration, and the on-chip firmware handles anti-collision without burdening the industrial host PLC or gateway. With conformal-coating-friendly HVQFN-40 packaging and 260 C peak reflow rating, the part is drop-in compatible with standard SMT lines.

🌐

IoT Provisioning and Wi-Fi/BLE Pairing Gateways

Smart-home hubs and IoT provisioning gateways use the PN7160A1HN/C100Y to enable NFC-based out-of-box pairing: a user taps a phone to transfer Wi-Fi credentials via the NFC Forum handover protocol without typing. The PN7160's autonomous polling cycles offload this task entirely from the gateway's Linux/Wi-Fi SoC, while the integrated DC-DC and LDO blocks keep the BOM small. The 1.8 V VDD rail connects directly to typical Wi-Fi/BLE SoC I/O domains.

💊

Medical Device Identification and Tracking

Medical device identification systems, including infusion pumps and diagnostic instruments, leverage the PN7160A1HN/C100Y's MIFARE DESFire and ISO/IEC 15693 support for clinician badge authentication and consumable tracking. The -30 C to +85 C operating range covers the thermal envelope of typical medical equipment, while the 40-VFQFN exposed-pad package simplifies thermal management on densely populated medical PCBs. NCI 2.0 firmware updates via I2C enable post-market security patches without hardware recall.

🚗

Automotive In-Cabin NFC Reader

The PN7160A1HN/C100Y's wide supply range (1.65-1.95 V host, 3.0-3.6 V NFC) and 13.56 MHz air interface make it suitable for non-safety automotive in-cabin applications such as Bluetooth pairing, driver personalization, and EV charging tap-to-start where the car-body NFC reader must operate from the vehicle's 12 V rail stepped down to 3.3 V. The exposed-pad package provides good thermal relief for the 500 mW peak dissipation during continuous RF polling. For AEC-Q100-qualified automotive designs, the PN7161 family derivatives provide the same footprint with automotive-grade qualification.

추천 제품 요약

PN7161A1HN/C100Y Apple ECP-enabled superset for tap-to-Pay ecosystems 사용처: EMVCo Contactless Payment Terminals, Bluetooth Tap-to-Pair Interfaces, Access Control and Door Reader Systems, Industrial Identification and Asset Tracking, IoT Provisioning and Wi-Fi/BLE Pairing Gateways, Medical Device Identification and Tracking, Automotive In-Cabin NFC Reader PN553 Legacy PN55 family NFC controller for backward-compatible POS 사용처: EMVCo Contactless Payment Terminals, Bluetooth Tap-to-Pair Interfaces, Access Control and Door Reader Systems, Industrial Identification and Asset Tracking, IoT Provisioning and Wi-Fi/BLE Pairing Gateways, Medical Device Identification and Tracking, Automotive In-Cabin NFC Reader
What is the PN7160A1HN/C100Y?
The PN7160A1HN/C100Y is an NXP Semiconductors NFC plug-and-play controller IC operating at 13.56 MHz, packaged in a 40-VFQFN exposed-pad (HVQFN-40, 6x6 mm). It integrates a full NCI 2.0 host interface over I2C, on-chip firmware handling ISO/IEC 14443 A/B, ISO/IEC 15693, FeliCa, and MIFARE protocols, plus a 1 W RF front-end, eliminating host-side protocol stack development.
What is the host interface voltage of PN7160A1HN/C100Y?
The PN7160A1HN/C100Y host-side supply (VDD) operates from 1.65 V to 1.95 V, typically set to 1.8 V, while the NFC front-end (VBAT/VIN) requires 3.0 V to 3.6 V. Both rails are independent per the NXP datasheet (PN7160_PN7161.pdf), enabling direct connection to a 1.8 V application processor and a 3.3 V system rail without external level shifters.
Does PN7160A1HN/C100Y support Apple ECP?
No, the PN7160A1HN/C100Y firmware variant does not include Apple Enhanced Contactless Polling (ECP). For ECP support, the NXP datasheet directs designers to the PN7161 family, which carries the equivalent pin-compatible silicon plus the ECP firmware licensed from Apple - functional superset of PN7160 in the same HVQFN-40 footprint.
What is the difference between PN7160A1HN/C100Y and PN7160A1HN/C100E?
Both parts share the same 40-VFQFN exposed-pad package and die, and both target the same 13.56 MHz contactless protocols. The C100Y variant ships with NXP standard production firmware, while the C100E is typically an engineering/early-samples firmware build per distributor cataloguing (DigiKey, Mouser). Production designs should use the C100Y variant for stable NCI behavior.
What protocols does PN7160A1HN/C100Y support?
According to the NXP datasheet (PN7160_PN7161.pdf), the PN7160A1HN/C100Y supports ISO/IEC 14443 Type A and B at 106/212/424/848 kbps, ISO/IEC 15693, FeliCa, MIFARE Classic, MIFARE DESFire, MIFARE Ultralight, and NFC-DEP (ISO 18092). This protocol breadth makes it suitable for payment, transit, access, and pairing applications on a single silicon platform.
What is the maximum TX output power of PN7160A1HN/C100Y?
The PN7160A1HN/C100Y delivers up to 1 W of RF output power into a properly tuned 13.56 MHz antenna loop, according to the NXP datasheet. Actual radiated field strength is bounded by ETSI EN 300 330 and FCC Part 15 regulatory limits and must be tuned via the external matching network. The internal DC-DC supports the high peak current demanded during transmit bursts.
Where to buy PN7160A1HN/C100Y online?
Authorized distributors stocking the PN7160A1HN/C100Y include DigiKey (PN7160A1HN-C100Y distributor listing), Mouser, and Avaq, with pricing as of 2026-10-20 starting around $5.20 for qty-1. Stock availability is generally strong given NXP's high-volume PN71xx production. For volume orders above 10k pieces, contact NXP franchised distributors for factory-direct quotes.
What is the lead time for PN7160A1HN/C100Y?
Lead time for PN7160A1HN/C100Y from authorized distributors is typically 8-12 weeks from factory as of 2026-10-20, although distributor shelf stock at DigiKey and Mouser often ships same-day for prototype quantities under 1k pieces. For production volumes, place orders 14-16 weeks ahead of assembly schedule to avoid line-down scenarios.
Is PN7160A1HN/C100Y in stock?
Stock status varies by distributor; DigiKey and Mouser typically show several thousand pieces of PN7160A1HN/C100Y available as of 2026-10-20. Backlog positions at franchised distributors remain healthy due to NXP's high-volume PN71xx production. Check real-time inventory at distributor portals before committing to a design-in schedule.
What is the price of PN7160A1HN/C100Y?
PN7160A1HN/C100Y unit pricing as of 2026-10-20 is approximately $5.20 at qty-1, dropping to roughly $3.85 at qty-100 and $2.75 at qty-1k. Volume pricing at 3k+ is around $2.40 per unit. Distributor-reported prices vary by reel packaging and shipping terms; consult DigiKey or Mouser for live distributor pricing.
PN7160A1HN/C100Y vs PN7161A1HN/C100Y - which should I choose?
Choose PN7160A1HN/C100Y for designs not requiring Apple Enhanced Contactless Polling (ECP); it carries all standard NFC Forum protocols at lower firmware complexity. Choose PN7161A1HN/C100Y when Apple ECP authorization is required and you need Apple-spec-compliant tap interactions. Both share the same HVQFN-40 footprint, so the PCB does not change.
Can PN7160A1HN/C100E replace PN7160A1HN/C100Y?
The PN7160A1HN/C100E is an engineering-sample firmware build of the same PN7160 silicon in the same HVQFN-40 package; it is considered a drop-in firmware-level replacement but is not recommended for production designs per distributor cataloguing. Use PN7160A1HN/C100Y firmware for production to ensure stable NCI 2.0 behavior and certified RF performance.
Where can I download the PN7160A1HN/C100Y datasheet PDF?
The official PN7160A1HN/C100Y datasheet (covering both PN7160 and PN7161 families) is available as a free PDF download from NXP at https://www.nxp.com/docs/en/data-sheet/PN7160_PN7161.pdf. The datasheet details the NCI 2.0 command set, electrical characteristics, antenna design guidelines, and firmware update procedures for the entire PN71xx family.
Where is the PN7160A1HN/C100Y pinout diagram?
The full HVQFN-40 pinout diagram for PN7160A1HN/C100Y appears on page 7 of the datasheet at https://www.nxp.com/docs/en/data-sheet/PN7160_PN7161.pdf. Pin 1 is located at the top-left of the exposed pad package with the dot marker; critical pins include TVSS (antenna ground), VCC (TX supply), VBAT/VIN, VDD (host I/O), SCL/SDA (I2C), and IRQ/VEN (host handshake).
What are the key specifications of PN7160A1HN/C100Y that engineers should know?
The PN7160A1HN/C100Y integrates an NCI 2.0 I2C host interface at 1.65-1.95 V, a 3.0-3.6 V NFC front-end delivering up to 1 W TX power at 13.56 MHz, and on-chip firmware supporting ISO/IEC 14443 A/B, ISO/IEC 15693, FeliCa, MIFARE Classic/DESFire/Ultralight, and NFC-DEP protocols in a 40-VFQFN 6x6 mm exposed-pad package per the NXP datasheet. Power dissipation peaks at 500 mW during continuous RF transmission.

엔지니어링 참조 데이터: PN7160A1HN-C100Y — 비교, 설계 지침 및 규정 준수 정보.

선택 가이드

Choose PN7160A1HN/C100Y for new NFC integration designs that do not require Apple ECP certification and that benefit from a single-chip plug-and-play controller with integrated DC-DC and on-chip firmware. It targets mainstream payment, access, pairing, and IoT-provisioning applications. Choose PN7161A1HN/C100Y instead when Apple ECP authorization is mandatory for tap-to-Pay ecosystems, since it carries the same HVQFN-40 footprint. Choose PN7160A1HN/C100E only for prototype evaluation - it shares the silicon but uses engineering-sample firmware unsuitable for production. Choose PN553 for legacy designs migrating from NCI 1.0 host drivers where PN7160 NCI 2.0 re-validation cost is not justified. All four parts share the same 40-VFQFN exposed-pad footprint, enabling PCB reuse across firmware variants.

대체품과의 비교

파라미터 이 제품 PN7161A1HN/C100Y PN7160A1HN/C100E PN553
Brand NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors
Package 40-VFQFN Exposed Pad (HVQFN-40) 40-VFQFN Exposed Pad (HVQFN-40) - same 40-VFQFN Exposed Pad (HVQFN-40) - same 40-VFQFN Exposed Pad (HVQFN-40) - same
RF Frequency 13.56 MHz 13.56 MHz 13.56 MHz 13.56 MHz
Host Interface I2C (NCI 2.0) I2C (NCI 2.0) I2C (NCI 2.0) I2C (NCI 1.0)
Apple ECP Support No Yes No No
Host Supply (VDD) 1.65 V to 1.95 V 1.65 V to 1.95 V 1.65 V to 1.95 V 1.65 V to 1.95 V
NFC Supply (VBAT) 3.0 V to 3.6 V 3.0 V to 3.6 V 3.0 V to 3.6 V 2.7 V to 5.5 V
Firmware Variant C100 (production) C100 (production, ECP) C100E (engineering sample) NCI 1.0 legacy

주요 차별점

  • Pin-compatible firmware upgrade path to Apple ECP (vs PN7161A1HN/C100Y)
  • On-chip DC-DC regulator reduces BOM (vs PN553)
  • Latest NCI 2.0 host command set (vs PN553 (NCI 1.0))

설계 노트

Route the I2C lines (SCL, SDA) and IRQ/VEN handshake signals away from the 13.56 MHz antenna loop to avoid capacitive coupling that could cause NCI timeouts. Per NXP antenna design guidelines, keep the EMC filter and antenna matching components within 5 mm of the TX1/TX2 pins and use a 50 ohm controlled-impedance trace for any extension. Stitch the ground plane beneath the HVQFN-40 exposed pad with 4-8 thermal vias (0.3 mm drill, 0.5 mm pitch) to dissipate up to 500 mW during continuous RF transmission.

The PN7160A1HN/C100Y's 40-VFQFN exposed-pad package requires the EP pin soldered to a continuous ground plane for both thermal dissipation and RF return-path integrity. Place decoupling capacitors (100 nF X7R plus 10 uF X5R) within 2 mm of VBAT, VCC_TX, and VDD pins. Per the NXP datasheet (PN7160_PN7161.pdf), the LX_DCDC switching node trace must be kept short (under 5 mm) and surrounded by a ground pour to minimize radiated EMI at the DC-DC fundamental of ~1.5 MHz.

Do not power the PN7160A1HN/C100Y from a single 3.3 V rail without tying VDD to a regulated 1.8 V source; the I2C pads are referenced to VDD and may be damaged if 3.3 V is applied to SCL/SDA when VDD is below 1.65 V. Avoid using PN7160A1HN/C100E (engineering-sample firmware) in production designs - some NCI commands return different responses versus C100 firmware, which can break certified RF stack tests. Always load the latest production firmware via the NCI firmware-update flow before deploying.

The 13.56 MHz carrier has a 22 m wavelength in air, but the antenna loop is electrically small (~5 cm diameter) and behaves as a near-field magnetic coupler. Maintain Q-factor between 20-30 by selecting the matching network inductor/capacitor values per NXP's PN7160 antenna calculator; too high Q narrows bandwidth and reduces read range, too low Q couples poorly. Add a TVS diode (such as PESD0402-140) across the antenna pads for ESD protection up to 8 kV contact discharge per IEC 61000-4-2.

규정 준수 정보

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
무연
Yes
무할로겐
Unknown
분쟁 광물
Compliant

RoHS compliant per NXP product page and DigiKey listing. PN7160A1HN/C100Y is not AEC-Q100 qualified; for automotive designs use NXP's automotive-derivative PN7161 family parts.

데이터 검증일: 2026-10-20 — XAIPART 부품 엔지니어링 팀이 검증하고 관리한 데이터

관련 검색

PN7160A1HN/C100Y datasheet PN7160A1HN-C100Y price NXP PN7160 NFC controller 13.56 MHz NFC plug and play controller HVQFN-40 NFC reader IC PN7160 payment terminal reference design PN7160 vs PN7161 PN7160 drop-in replacement buy PN7160A1HN-C100Y NCI 2.0 NFC controller I2C PN7160A1HN pinout HVQFN-40 what is the output power of PN7160

관련 부품 & 용어

NXP Semiconductors PN7160A1HN/C100Y PN7161A1HN/C100Y PN7160A1HN/C100E PN553 NFC controller RFID reader 13.56 MHz ISO/IEC 14443 ISO/IEC 15693 FeliCa MIFARE Classic MIFARE DESFire MIFARE Ultralight NCI 2.0 I2C Apple ECP HVQFN-40 VFQFN Exposed Pad VQFN package family RoHS EMVCo PCI-PTS Bluetooth tap-to-pair contactless payment terminal
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