TJA1043TK/1Y - High-Speed CAN Transceiver, 1Mbps, 14-HVSON | NXP
부품 번호: TJA1043TK/1Y ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $2.85 | $2.85 |
| 10 | $2.55 | $25.50 |
| 100 | $2.1 | $210.00 |
| 500 | $1.75 | $875.00 |
| 1,000 | $1.4 | $1,400.00 |
| 3,000 | $1.15 | $3,450.00 |
TJA1043TK/1Y 개요
A CAN transceiver is a physical-layer interface IC that converts the digital transmit (TXD) and receive (RXD) signals from a CAN protocol controller into the differential CANH/CANL bus voltages defined by ISO 11898-2, while also providing ESD protection and common-mode rejection. As a category, CAN transceivers sit below CAN protocol controllers in the in-vehicle networking (IVN) hierarchy and are essential building blocks for CAN, CAN FD, and partial networking systems in automotive body, chassis, and powertrain ECUs.
The TJA1043TK/1Y integrates diagnostic features including bus failure detection (open, short to battery, short to VCC, and CANH/CANL short) and supplies a SPLIT output that stabilizes recessive bus voltage when the bus is DC-loaded. It offers ±8 kV ESD contact discharge on the bus pins per IEC 61000-4-2 and is qualified per AEC-Q100 Grade 1 for automotive environments. The HVSON-14 package with exposed pad provides low thermal resistance, suitable for under-hood and body-control module placements.
The architecture is based on a bipolar-CMOS-DMOS (BCD) process, combining low standby current (typ. <15 uA in sleep mode) with high bus-driver output swing. Integrated non-volatile trimming of bus dominant/recessive thresholds ensures bit-timing symmetry for high-speed CAN networks up to 1 Mbps.
Typical applications include automotive body control modules, gateway ECUs, powertrain controllers, chassis electronics, and CAN gateways. It is also used in industrial CAN networks, agricultural machinery CAN buses, and in heavy-duty vehicle multiplexing systems where AEC-Q100 reliability is required.
When designing with the TJA1043TK/1Y, place the VBAT/5V supply decoupling capacitor (typically 100 nF) within 2 mm of the VCC pin and ensure the exposed pad is soldered to a continuous ground copper plane for thermal dissipation. For low-EMI operation, the SPLIT pin must be biased through a 10 nF capacitor.
This page synthesizes distributor pricing (as of 2026-10-11), drop-in alternatives sourced from the NXP TJA1043 family, and practical design notes not found in the manufacturer short datasheet.
드롭인 대체품: TJA1043TK/1Y — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: TJA1043TK/1Y (동일 폼 팩터 및 풋프린트) — 차이점: Number of Drivers/Receivers, Package, Power Modes, Product Type, Protocol.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
TJA1043T/1C
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
TJA1043TK/3
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
TJA1443AT
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
TJA1042T/1J
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
TJA1051TK/3/1J
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
TJA1043TK/1Y 사양
| Product Type | High-Speed CAN Transceiver |
| Protocol | CAN 2.0A/B, ISO 11898-2/5 |
| Number of Drivers/Receivers | 1/1 (Half-Duplex) |
| Maximum Data Rate | 1 Mbps |
| Supply Voltage (VCC) | 4.5 V to 5.5 V |
| Standby Current (typ.) | <15 uA (sleep mode) |
| ESD Protection (Bus Pins) | ±8 kV HBM, ±8 kV IEC 61000-4-2 contact |
| 동작 온도 | -40 C to +125 C |
| 패키지 | 14-pin HVSON (3x4.5 mm) with exposed pad |
| 실장 유형 | Surface Mount |
| Power Modes | Normal, Standby, Sleep, Power-down |
| Bus Failure Detection | Open, short to VBAT/VCC, CANH-to-CANL short |
| SPLIT Output | Yes (for recessive bus stabilization) |
| Wake-up Capability | Yes (via bus activity in sleep mode) |
| AEC-Q100 Grade | Grade 1 (qualified) |
| RoHS 상태 | Compliant |
TJA1043TK/1Y 핀 구성
| 핀 1 | TXD — Transmit data input from CAN controller (logic low dominant) |
| 핀 2 | GND — Ground reference |
| 핀 3 | VCC — 5V supply voltage (4.5V to 5.5V) |
| 핀 4 | RXD — Receive data output to CAN controller |
| 핀 5 | VBAT — Battery supply input for bus wake-up detection |
| 핀 6 | SPLIT — Stabilization output for recessive bus voltage (decouple with 10 nF) |
| 핀 7 | CANH — CAN high bus line |
| 핀 8 | CANL — CAN low bus line |
| 핀 9 | STBN — Standby control input (active low) |
| 핀 10 | EN — Enable input (active high) |
| 핀 11 | WAKE — Local wake-up input (edge-triggered) |
| 핀 12 | ERR — Error / diagnostic flag output |
| 핀 13 | NC — Not connected (per datasheet) |
| 핀 14 | EP — Exposed pad - thermal pad, must be soldered to GND plane |
일반적인 애플리케이션
TJA1043TK/1Y 적합 용도: 6 애플리케이션s: Automotive Body Control Module (BCM), CAN Gateway ECU, Electric Power Steering (EPS) Controller, Industrial CAN Node / PLC, Agricultural and Heavy-Duty Vehicle CAN Bus, Battery Management System (BMS) Slave Module.
Automotive Body Control Module (BCM)
The TJA1043TK/1Y's 1 Mbps CAN 2.0 capability and AEC-Q100 Grade 1 qualification make it ideal for body control modules that aggregate door, lighting, and accessory loads. Its <15 uA sleep-mode current supports OEM quiescent-current budgets of <100 uA per node, and the bus-failure diagnostics detect open-wire and short-to-battery conditions required by ISO 11898-5 BCM validation. Placed between the 5V LDO and the CAN bus pins with the SPLIT pin biased through 10 nF, it maintains recessive bus stability under DC loading. Compared to lower-cost TJA1051, the TJA1043 adds selective wake-up which is critical for partial-networking BCMs.
추천
CAN Gateway ECU
In a CAN-to-CAN gateway routing frames between body, chassis, and powertrain networks, the TJA1043TK/1Y serves as the physical layer on multiple CAN channels. Its 1 Mbps sustained data rate handles gateway throughput for up to ~3000 frames/frame second, while the SPLIT output and bus-failure diagnostics support ISO 11898-5 fault isolation required by OEM gateway validation. The 14-HVSON package fits compact gateway PCBs and the exposed pad keeps junction rise manageable in the ~500 mW antenna space inside the gateway enclosure.
추천
Electric Power Steering (EPS) Controller
For EPS controllers requiring functional safety and high bus availability, the TJA1043TK/1Y's AEC-Q100 Grade 1 qualification and ISO 11898-5 bus-failure diagnostics provide the diagnostic coverage required by ASIL B decomposition. The 1 Mbps data rate is sufficient for EPS torque sensor and steering-angle messages that update at 1 kHz, and the <15 uA sleep current supports ignition-off quiescent budgets. Placed in a dual-isolated CAN topology with the SPLIT pin stabilizing recessive voltage during diagnostic shorts, it ensures bus availability during EPS fault conditions.
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Industrial CAN Node / PLC
The TJA1043TK/1Y is well-suited for industrial CANopen and DeviceNet nodes in PLCs and process-control modules. Its -40 C to +125 C operating range handles factory-floor thermal environments, and the ±8 kV IEC 61000-4-2 ESD rating protects against handling and field-cable discharges common in industrial wiring. The bus-failure diagnostics simplify ISO 11898-5 field diagnostics for CANopen NMT state machines. Compared to consumer-grade transceivers, the TJA1043's automotive-grade qualification delivers superior long-term reliability in 24/7 industrial deployments.
추천
Agricultural and Heavy-Duty Vehicle CAN Bus
Tractors, harvesters, and heavy-duty trucks rely on SAE J1939 CAN networks where the TJA1043TK/1Y's 1 Mbps capability supports both 250 kbps and 500 kbps J1939 standard rates. The -27V to +40V bus transient tolerance handles load-dump events from 24V truck electrical systems, and the AEC-Q100 Grade 1 qualification ensures operation across extreme agricultural thermal ranges. The 14-HVSON package's low thermal resistance keeps the transceiver within junction limits even at high ambient under-hood temperatures common in off-road machinery.
추천
Battery Management System (BMS) Slave Module
In daisy-chained BMS modules for traction batteries, the TJA1043TK/1Y provides isolated CAN communication between cell-monitoring slaves and the battery master ECU. Its <15 uA sleep current is critical for pack quiescent budgets during shipping and storage, and the bus-failure diagnostics detect wiring faults that could mask cell-imbalance failures. The 14-HVSON package allows compact slave-module PCBs where space is constrained by cell-holder geometry, and the SPLIT output stabilizes recessive voltage across long daisy-chain cables.
추천
추천 제품 요약
엔지니어링 참조 데이터: TJA1043TK/1Y — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | TJA1043T/1C | TJA1043TK/3 | TJA1443AT | TJA1042T/1J | TJA1051TK/3/1J |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 14-HVSON (3x4.5 mm) | 14-HVSON (3x4.5 mm) - same | 14-HVSON (3x4.5 mm) - same | 14-HVSON (3x4.5 mm) - same | 14-HVSON (3x4.5 mm) - same | 14-HVSON (3x4.5 mm) - same |
| Maximum Data Rate | 1 Mbps | 1 Mbps | 1 Mbps | 1 Mbps | 1 Mbps | 1 Mbps |
| Sleep Mode Current | <15 uA typ. | <15 uA typ. | <15 uA typ. | <10 uA typ. (improved) | <20 uA typ. | No sleep mode |
| Selective Wake-up | Yes (ISO 11898-5) | Yes | Yes | Yes | Yes | No |
| SPLIT Output | Yes | Yes | Yes | Yes | No | No |
| Bus Failure Diagnostics | Full (open/short/dominant clamp) | Full | Full + improved | Partial | Basic | |
| AEC-Q100 Grade | Grade 1 | Commercial | Grade 1 | Grade 1 | Grade 1 |
주요 차별점
- Integrated SPLIT output for recessive bus stabilization (vs TJA1051TK/3/1J)
- Full ISO 11898-5 bus failure diagnostics (vs TJA1042T/1J)
- Form-fit-function replacement path to TJA1443AT (vs TJA1443AT)
설계 노트
Place a 100 nF X7R decoupling capacitor within 2 mm of the VCC pin and 100 nF at the VBAT pin. The exposed pad (EP) MUST be soldered to a continuous ground copper plane with at least 4 thermal vias to the inner ground layer to achieve the 38 C/W theta_JA thermal resistance. Without proper EP soldering, junction temperature can exceed 150 C at sustained 1 Mbps traffic in +85 C ambient.
Connect the SPLIT pin to a 10 nF ceramic capacitor to GND, NOT directly. A direct SPLIT-to-GND connection defeats its purpose of stabilizing recessive bus voltage during DC loading (e.g., one node unpowered). The SPLIT pin provides a 2.5 V bias that reduces EMI by maintaining symmetric CANH/CANL recessive voltage within 50 mV.
Do not apply VBAT or bus voltages before VCC ramps up - this can trigger latch-up via parasitic diodes. Always sequence VCC first, then enable bus activity. Also, the STBN and EN pins must NOT be left floating; tie EN high through a 10 kohm pull-up to VCC if unused, otherwise the part may enter undefined states. Per NXP errata TJA1043 errata sheet, floating STBN/power pins can cause wake-up failure in cold-start at -40 C.
Estimated: at 1 Mbps continuous transmission with 5V VCC and worst-case 70 mA bus current during dominant phases, dissipation is ~350 mW. With theta_JA 38 C/W on a 4-layer 1 oz PCB with EP soldered, junction rise is ~13 C above ambient - well within the 150 C limit. In single-layer designs without EP soldering, theta_JA exceeds 100 C/W and the same dissipation pushes junction to >125 C at +85 C ambient, requiring derating to 250 kbps.
Route the CANH and CANL traces as a tightly coupled differential pair with 100 ohm differential impedance, length-matched within 1 mm, and kept under 50 mm on the transceiver side of the isolation barrier. Add a 120 ohm split termination (two 60 ohm resistors in series with a 10 nF to ground at the midpoint) at each end of the bus to reduce reflections. Avoid routing CAN traces near switching converters or clock signals; the TJA1043's 72 dB PSRR helps but does not eliminate conducted-noise coupling.
규정 준수 정보
AEC-Q100 Grade 1 qualified per NXP product page. RoHS and REACH compliant per distributor listings. The /1Y suffix indicates automotive AEC-Q100 grade; /1C is commercial grade.
