TLC3545IDGKR - 14-Bit 200kSPS SAR ADC, Serial Out | Texas Instruments
부품 번호: TLC3545IDGKR ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $7.45 | $7.45 |
| 10 | $6.7 | $67.00 |
| 100 | $5.62 | $562.00 |
| 500 | $4.88 | $2,440.00 |
| 1,000 | $4.25 | $4,250.00 |
TLC3545IDGKR 개요
An SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a type of data converter that resolves a binary output one bit per clock cycle using a binary-weighted capacitor array and a comparator. SAR ADCs sit within the broader hierarchy: ADC -> data converter -> signal chain IC -> semiconductor. Compared to delta-sigma converters, SAR ADCs offer deterministic throughput and zero pipeline latency, which makes them well-suited to multiplexed acquisition, motor control loops, and any application where the sample timing must be tightly bounded.
The TLC3545 samples at 200 kSPS from a single 5-V analog supply, draws only 5.8 mW at full speed, and drops to 10 uA in auto-power-down between conversions. The 8-pin MSOP PowerPAD package provides a low thermal-resistance path (theta_JA roughly 80 C/W with the pad soldered) so the converter can be placed next to digital logic without local heating concerns.
Typical applications include industrial process-control front ends, optical encoder read-out boards, portable data loggers, and the analog input stage of DSP-based motor drives. Because the device is pin-compatible with the TLC3541 (12-bit) and other members of the TLC354x family, designers can swap resolution without re-laying-out the PCB.
When designing with this part, place a 0.1 uF ceramic bypass capacitor within 5 mm of the AVDD pin and use the PowerPAD as the primary ground return for the analog input traces. The auto-power-down feature is enabled by tying CS high between conversions - this is the easiest way to drop average supply current in battery-powered systems.
This page synthesizes distributor pricing, drop-in pin-compatible alternatives (TLC3545IDGKG4, TLC3545ID, TLC3545IDGK), and practical layout notes not found in the manufacturer datasheet front matter.
드롭인 대체품: TLC3545IDGKR — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
TLC3545IDGKG4
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
TLC3545IDGK
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
TLC3541IDGKR
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
TLC3544IDGKR
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
TLC3543IDGKR
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
ADS7850IRTER
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
TLC3545IDGKR 최대 정격 & 전기적 특성
| 분해능 | 14 bit |
| Sample Rate | 200 kSPS |
| Number of Input Channels | 1 |
| Input Type | Pseudo-Differential |
| Architecture | SAR |
| Supply Voltage (Analog) | 5 V |
| Supply Voltage (Digital) | 5 V |
| Power Consumption (Active, 200 kSPS) | 5.8 mW typical |
| Power Consumption (Auto-Power-Down) | 10 uA typical |
| 인터페이스 | Serial (SPI/QSPI/Microwire-compatible) |
| 패키지 | 8-pin MSOP PowerPAD (DGK) |
| 실장 유형 | Surface Mount |
| RoHS 상태 | Compliant |
| Auto-Power-Down | Yes (CS high) |
TLC3545IDGKR 핀 구성
| 핀 1 | AIN+ — Analog input (positive, pseudo-differential) |
| 핀 2 | AIN- — Analog input (negative, pseudo-differential reference) |
| 핀 3 | AVDD — Analog supply voltage (5 V) |
| 핀 4 | AGND — Analog ground |
| 핀 5 | REF — Voltage reference input |
| 핀 6 | SDO — Serial data output |
| 핀 7 | SCLK — Serial clock input |
| 핀 8 | CS — Chip select (active low); hold high to enable auto-power-down |
일반적인 애플리케이션
TLC3545IDGKR 적합 용도: 6 애플리케이션s: Industrial Process-Control Front End, Optical Encoder and Resolver Read-Out, Portable Battery-Powered Data Logger, DSP-Based Motor-Drive Current Sense, Medical Patient-Monitoring Analog Front End, Audio Analyzer and Test Instrumentation.
Industrial Process-Control Front End
The TLC3545IDGKR's 14-bit 200-kSPS throughput and pseudo-differential input make it a strong fit for industrial process-control analog front ends, where 4-20 mA loop signals, RTD bridges, and thermocouple outputs must be digitized and forwarded to a PLC or DSP. The pseudo-differential topology rejects common-mode noise from long factory-floor cable runs, while the 5.8 mW active power dissipation allows multiple channels to be multiplexed behind a single converter without thermal stress on the MSOP PowerPAD package. Placed at the analog front end ahead of an isolation barrier, the TLC3545IDGKR delivers deterministic 5 us conversion latency that simplifies the host PLC's loop-time calculation.
추천
Optical Encoder and Resolver Read-Out
The TLC3545IDGKR suits optical encoder and resolver read-out boards because its deterministic SAR conversion latency makes it straightforward to align analog samples with quadrature-index pulses. The 200-kSPS sample rate supports up to 200,000 position samples per second, more than adequate for most servo-loop and CNC spindle applications. The pseudo-differential input is ideal for digitizing the sine/cosine outputs of a resolver via a front-end op-amp, since common-mode offsets can be rejected at the ADC input. Companion analog-conditioning ICs such as the THS1040CPWRG4 are commonly placed upstream of the TLC3545IDGKR to drive its analog input from low-impedance encoder signals.
추천
Portable Battery-Powered Data Logger
The TLC3545IDGKR's 10 uA auto-power-down current makes it well suited to portable battery-powered data loggers that spend most of their time idle between sensor readings. According to TI's TLC3545 datasheet, holding CS high between conversions automatically drops the supply current to 10 uA, enabling months of standby operation on a single coin cell. The 14-bit resolution is sufficient for environmental sensors (temperature, humidity, strain-gauge bridges) and the 5.8 mW active dissipation at full 200-kSPS keeps the MSOP PowerPAD package within thermal limits even during sustained burst sampling. The serial SPI-compatible interface also allows direct connection to a low-power microcontroller such as TI's MSP430 family.
추천
DSP-Based Motor-Drive Current Sense
The TLC3545IDGKR's deterministic 5 us conversion time and SPI-compatible interface make it a good match for DSP-based motor-drive current-sense feedback loops, where the ADC must sample phase currents synchronously with the PWM cycle. The 14-bit resolution is sufficient for field-oriented control of permanent-magnet motors at switching frequencies up to 200 kHz, and the pseudo-differential input can directly digitize current-shunt amplifier outputs centered around a 2.5-V common-mode voltage. The 5.8 mW active power dissipation is negligible compared to the gate-driver and inverter losses, so the MSOP PowerPAD package can be placed directly next to the shunt resistors without thermal interference.
추천
Medical Patient-Monitoring Analog Front End
The TLC3545IDGKR's 14-bit resolution and pseudo-differential input topology suitable for medical patient-monitoring analog front ends such as ECG, pulse-oximeter, and respiration-rate signal chains. The pseudo-differential input provides common-mode rejection of 50/60 Hz mains interference picked up by patient lead cables, while the 200-kSPS sample rate easily oversamples physiological signals at the bandwidths required for diagnostic-grade monitoring. The 5-V single-supply operation simplifies battery-powered designs such as portable telemetry units, and the 8-pin MSOP PowerPAD package keeps the analog front end compact enough to fit inside a wearable form factor.
추천
Audio Analyzer and Test Instrumentation
The TLC3545IDGKR's 14-bit resolution at 200 kSPS makes it suitable for audio-bandwidth test and measurement instrumentation, including bench-top audio analyzers, sound-level meters, and loudspeaker crossover test sets. According to TI's TLC3545 datasheet, the SAR architecture provides glitch-free single-shot conversions with no latency, which simplifies automated test sequences that require deterministic timing. The pseudo-differential input can digitize line-level audio signals from 0.316 Vrms to 1.0 Vrms directly, and the SPI-compatible serial output allows direct streaming to an FPGA-based signal-processing engine. The 5.8 mW dissipation keeps the MSOP PowerPAD package within thermal limits even in dense ATE pin-electronics cards.
추천
추천 제품 요약
엔지니어링 참조 데이터: TLC3545IDGKR — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | TLC3545IDGKG4 | TLC3545IDGK | TLC3541IDGKR | TLC3544IDGKR |
|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 8-MSOP PowerPAD (DGK) | 8-MSOP PowerPAD (DGK) - same | 8-MSOP PowerPAD (DGK) - same | 8-MSOP PowerPAD (DGK) - same | 8-MSOP PowerPAD (DGK) - same |
| Resolution | 14 bit | 14 bit | 14 bit | 12 bit | 14 bit |
| Sample Rate | 200 kSPS | 200 kSPS | 200 kSPS | 200 kSPS | 200 kSPS |
| Input Channels | 1 (pseudo-differential) | 1 (pseudo-differential) | 1 (pseudo-differential) | 1 (pseudo-differential) | 1 (single-ended) |
| Auto-Power-Down | Yes | Yes | Yes | Yes | Yes |
| Supply Voltage | 5 V | 5 V | 5 V | 5 V | 5 V |
| Interface | Serial SPI/QSPI/Microwire | Serial SPI/QSPI/Microwire | Serial SPI/QSPI/Microwire | Serial SPI/QSPI/Microwire | Serial SPI/QSPI/Microwire |
주요 차별점
- Pseudo-differential input stage in the same DGK footprint as single-ended variants (vs TLC3544IDGKR (single-ended))
- Higher 14-bit resolution versus the 12-bit TLC3541 (vs TLC3541IDGKR (12-bit))
- Pin-compatible drop-in across reel-packaging grades (vs TLC3545IDGKG4 (Pb-free grade))
설계 노트
Place a 0.1 uF ceramic bypass capacitor within 5 mm of the AVDD pin and tie AGND directly to the exposed PowerPAD ground pour. The PowerPAD must be electrically bonded to the analog ground plane through at least four thermal vias (0.3 mm diameter) to keep theta_JA near the datasheet's typical value. Separating the analog ground plane from the digital ground plane and stitching them together only at the AGND pin prevents digital switching noise from coupling into the analog input.
Auto-power-down is only entered when CS is held high - do not leave CS low between samples or the device will stay in its active 5.8 mW state. According to the TI TLC3545 datasheet, CS must transition high after the last SCLK falling edge of the conversion frame. Designers using a dedicated hardware-managed CS line should verify the firmware does not park CS low during idle periods, otherwise the 10 uA power-down benefit is lost.
Route the analog input traces as a differential pair with a solid analog ground on the layer below, even though the TLC3545 uses only one pseudo-differential input. Keeping the AIN- trace parallel to AIN+ minimises common-mode pickup, and surrounding the analog input pair with a ground fence reduces noise injection from nearby digital lines. Keep the analog input traces short (< 50 mm) and avoid routing them near the SCLK trace to avoid digital coupling during the conversion window.
Estimated: at AVDD = 5 V and 200-kSPS continuous operation, the TLC3545IDGKR draws roughly 1.16 mA from the analog supply (5.8 mW / 5 V), which is negligible for most LDO regulators. If the same rail powers other analog ICs, ensure the upstream regulator can deliver at least 1.5x the sum of all analog loads plus 20 mA headroom for digital transients. The 10 uA power-down current means battery-powered designs should size their hold-up capacitor to ride out the 5 us active conversion window at full load.
규정 준수 정보
RoHS and lead-free status per TI product page. Not AEC-Q100 qualified; choose a Q1-graded variant for automotive designs.
