ADC/DAC
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LTC2365ITS8 - 1Msps 12-Bit Serial SAR ADC in TSOT-23-8 | Analog Devices
The Analog Devices LTC2365ITS8 is a 1Msps, 12-bit, single-channel, serial-interface successive-approximation-register (SAR) analog-to-digital converter that operates from a single 3V supply and draws only 2mA. The device integrates a high dynamic range sample-and-hold front end with a high-speed SPI-compatible serial data interface, and is offered in a space-saving 8-pin TSOT-23 (TSOT-23-8) surface-mount package. A SAR ADC is a successive-approximation-register analog-to-digital converter that resolves N bits in N clock cycles using a binary-search charge-redistribution DAC. SAR ADCs are valued for their deterministic latency (single-cycle conversion), zero pipeline delay, low power consumption, and excellent DC accuracy at moderate sample rates - characteristics that make them the dominant converter architecture for multiplexed data acquisition, industrial instrumentation, and precision sensor signal chains. Key features of the LTC2365ITS8 include a 1Msps guaranteed sample rate, 12-bit no-missing-codes resolution, a true bipolar or unipolar software-selectable input range of 0V to VDD or 0V to VREF (where VREF is set by an external reference), 72dB SINAD and -80dB THD at full sample rate, and a power-down mode that reduces supply current to under 1 microamp between conversions. The serial interface is SPI-/MICROWIRE-/QSPI-/DSP-compatible, allowing direct connection to most microcontrollers, FPGAs, and digital signal processors without glue logic. The 'I' suffix designates the industrial operating-temperature grade (-40C to +85C), and the 'TS8' suffix denotes the 8-pin TSOT-23 (Thin Small Outline Transistor) plastic package. Outstanding AC performance at 1Msps, combined with an extremely small footprint and 2mA supply current, makes the LTC2365ITS8 ideal for compact, battery-powered or isolated data-acquisition modules where board real estate and power dissipation are at a premium. Typical applications include portable and handheld instrumentation, multi-channel data-acquisition systems (using an external analog multiplexer), isolated industrial sensors and 4-20mA loop digitizers, optical module monitoring, and battery management system (BMS) cell voltage and current monitoring in compact embedded designs. When designing with the LTC2365ITS8, place the 0.1 microfarad VDD bypass capacitor as close as possible to the supply pin to minimize digital switching noise on the analog rail. Drive the analog input with a low-impedance, low-noise op-amp buffer (such as the AD8628 or AD8031) to avoid gain error and distortion from source impedance, since the ADC's input draw is non-zero during acquisition. This page synthesizes distributor pricing, drop-in package-and-pin compatible alternatives, and practical design notes that complement the manufacturer datasheet.
LTC2366ITS8 - 12-Bit 3Msps Serial SAR ADC | Analog Devices
The Analog Devices LTC2366ITS8 is a 12-bit, 3 Msps, single-channel successive-approximation-register (SAR) analog-to-digital converter housed in an 8-pin TSOT-23 package. It operates from a single 2.35 V to 3.6 V supply, drawing only 2.6 mA at 3 Msps, and accepts a 0 V to VDD unipolar input range with true ground-referenced sampling. The serial interface is SPI/QSPI/MICROWIRE-compatible, and the part delivers 72 dB SINAD and -80 dB THD at the full 3 Msps throughput. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a type of data converter that performs a binary search against the analog input using an internal DAC and comparator, producing one conversion per N bit-clock cycles. SAR ADCs are valued in precision data-acquisition systems because they sample the input on a single aperture, exhibit zero pipeline latency, and provide excellent DC accuracy with low power consumption - ideal attributes when a system must respond to multiplexed or transient analog events without delay. The LTC2366 family sits within the SAR ADC hierarchy: ADC -> data converter -> signal chain IC -> mixed-signal semiconductor. Key features of the LTC2366 include a high dynamic range sample-and-hold front end, automatic Nap and Sleep power-down modes between conversions, a dedicated REF pin for an external reference, and an SDO line that goes high-impedance when CS is de-asserted to allow multiple parts to share a SPI bus. The TSOT-23-8 footprint is among the smallest available for any 12-bit ADC in this speed class, enabling dense multi-channel data-acquisition front ends on compact PCBs. Architecturally the LTC2366 combines a charge-redistribution DAC array with a low-noise comparator and on-chip clock generator. The external reference (typically 2.5 V or 3.0 V) sets full-scale range; the wide-input-tolerance single-supply design simplifies power-tree design in 3.3 V systems. Latency is one conversion cycle, with throughput controlled by the SCK frequency and CS framing. Typical applications include portable instrumentation, isolated data acquisition, multi-channel multiplexed sensor front ends, motor control feedback loops, optical sensor read-out, and process-control analog input modules. Industrial automation modules and battery-powered handheld meters benefit from its low 2.6 mA active current and sub-microamp Sleep mode. The wide SINAD margin also allows direct connection to high-impedance bridge sensors or audio-bandwidth signal sources when paired with appropriate input buffers. When designing with this part, ensure the reference bypass network uses a high-quality ceramic capacitor close to the REF pin to avoid conversion noise, and keep the SCK trace impedance-controlled to prevent coupling into the analog input. The Nap/Sleep duty-cycle can be tuned to average supply current well below the active 2.6 mA figure for duty-cycled battery systems. This page synthesizes distributor pricing, drop-in alternatives drawn from the same LTC236x family and competitor parametric equivalents, and practical PCB design notes that are not collated in the manufacturer datasheet.
LTC2372CUH-16 - 16-Bit 500ksps 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2372CUH-16 is a low-noise, high-speed, 16-bit successive approximation register (SAR) analog-to-digital converter with a maximum sample rate of 500 ksps and an integrated 8-channel low-crosstalk input multiplexer. Operating from a single 5 V supply, the part is offered in a 32-lead 5 mm × 5 mm QFN (UH) plastic package, with the LTC2372CUH-16 being the commercial-temperature grade pin-compatible variant of the LTC2372-16 family. A SAR ADC is a successive-approximation-register analog-to-digital converter: a type of Nyquist-rate data converter that performs one conversion per sample clock by binary-searching an internal capacitive DAC against the input voltage. SAR ADCs sit in the broader hierarchy of ADC → data converter → mixed-signal IC → semiconductor device, combining precision analog sampling with synchronous digital logic on a single die. Compared with delta-sigma converters, SAR ADCs offer deterministic latency, no pipeline delay, and excellent multi-channel multiplexing behavior, which is exactly why the LTC2372CUH-16 was architected around an 8-to-1 input MUX. Key features include a fully differential ±VREF input stage (pseudo-differential unipolar and pseudo-differential bipolar inputs are also configurable), an integrated 2.048 V temperature-compensated reference with 20 ppm/°C maximum drift, a single-shot capable reference buffer, and 96 dB SNR. The high-speed SPI-compatible serial interface supports 1.8 V, 2.5 V, 3.3 V and 5 V host logic, and includes a sequencer with 16 steps that can cycle through any subset of the 8 input channels without host intervention. The combination of 500 ksps throughput, 16-bit resolution, 8-channel MUX, and integrated reference makes the LTC2372CUH-16 a strong fit for multiplexed industrial data acquisition, multi-sensor monitoring, and instrumentation front-ends where several analog signals must be digitized by a single converter. The integrated reference eliminates the need for an external 2.048 V reference IC in space-constrained designs. A typical design consideration is that the part's INL and SNR are specified with the on-chip reference buffer enabled; bypassing it degrades AC performance, so the reference buffer pin should be driven according to the datasheet's reference circuit. For best 16-bit noise performance, the analog inputs should be driven by a low-impedance, low-noise op-amp front end. This page synthesizes distributor stock and pricing, drop-in package-compatible alternatives, and practical interface/PCB design notes not found in the manufacturer datasheet alone, organized for engineers evaluating the LTC2372CUH-16 for production designs.
LTC2372CUH-18 - 18-Bit 500ksps 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2372CUH-18 is a low-noise, high-speed 18-bit successive approximation register (SAR) analog-to-digital converter (ADC) with 8 input channels and a maximum throughput of 500 kSPS, offered in a 32-lead QFN (5x5 mm) package. It achieves ±2.75 LSB (max) INL, no missing codes at 18-bit resolution, and 100 dB SNR (fully-differential) / 95 dB SNR (pseudo-differential) typical. The integrated low-drift 2.048 V temperature-compensated reference (20 ppm/°C max) plus a single-shot capable reference buffer simplify external analog design. An analog-to-digital converter (ADC) is a mixed-signal integrated circuit that converts a real-world continuous analog voltage into a discrete digital code proportional to the input. Within the broader signal-chain taxonomy, the LTC2372-18 belongs to the successive-approximation-register ADC family, which sits under precision data converters (alongside delta-sigma and pipeline ADCs) and ultimately the data-acquisition / power-management IC hierarchy. SAR ADCs are favored when applications need high throughput (hundreds of kSPS to multi-MSPS) with low latency and no pipeline delay, at 16- to 20-bit resolution. Key features include a configurable low-crosstalk 8-channel input multiplexer accepting fully-differential, pseudo-differential unipolar, and pseudo-differential bipolar inputs; a high-speed SPI-compatible serial interface supporting 1.8 V, 2.5 V, 3.3 V, and 5 V logic; a sequencer with a depth of 16; and true 18-bit performance with no missing codes. The single 5 V supply operation simplifies power-tree design, while an internal reference buffer keeps the reference pin stable during single-shot conversions. Architecturally, the LTC2372-18 combines a high-performance 18-bit capacitive SAR core with an integrated input MUX and an on-chip reference/buffer, eliminating the need for an external low-noise reference and ADC-driver buffer in many precision applications. The combination of 100 dB SNR and 500 kSPS throughput targets instrumentation, medical imaging front-ends, and industrial process control. Typical applications include multi-channel data-acquisition systems, medical imaging front-ends, precision industrial process control, vibration analysis, and automatic test equipment (ATE). The wide input-range flexibility also supports direct connection to bridge sensors, thermocouples, and RTD front-ends through simple external instrumentation amplifiers. When laying out the PCB, keep analog and digital ground returns separated under the ADC and join them at a single point near the exposed pad; bypass the 5 V supply with a 1 µF ceramic plus a 10 µF bulk capacitor placed within 5 mm of the AVDD pin. To minimize channel-to-channel crosstalk at 500 kSPS, route the 8 analog inputs with matched impedance and keep them away from the CNV/MCLK/SCK digital traces. This page synthesizes distributor pricing, drop-in alternatives within the LTC23xx family, and practical layout guidance that complements the manufacturer datasheet.
LTC2372HUH-16 - 16-Bit 500ksps 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2372HUH-16 is a low noise, high speed, 8-channel 16-bit successive approximation register (SAR) ADC operating from a single 5V supply, housed in a 32-pin QFN (5x5 mm) package. It features a 500 ksps maximum sample rate, 1.5 µs conversion time, 96 dB SNR, and an onboard low-drift (20 ppm/°C max) 2.048V temperature-compensated reference with a single-shot reference buffer. An ADC (Analog-to-Digital Converter) is a data-acquisition component that converts real-world analog signals into digital codes for processing by microcontrollers, DSPs, or FPGAs. A SAR (Successive Approximation Register) ADC is a specific architecture that uses a binary-search algorithm and an internal DAC to converge on the input voltage in N clock cycles for N-bit resolution. Within the broader hierarchy, SAR ADCs sit alongside pipelined, sigma-delta, and flash converters in the precision data-converter category, balancing speed, accuracy, and power. Key features include a highly configurable, low-crosstalk 8-channel input multiplexer supporting fully differential, pseudo-differential unipolar, and pseudo-differential bipolar analog input ranges. The high-speed SPI-compatible serial interface supports 1.8V, 2.5V, 3.3V, and 5V logic, and an on-chip sequencer with a depth of 16 allows autonomous channel scanning. The internal reference removes the need for an external precision reference and the associated board area. The architecture combines a charge-redistribution capacitive DAC with a precision comparator and internal clock, achieving excellent INL and DNL while maintaining low power. The 5V single-supply operation and wide logic-level compatibility simplify interface to modern MCUs without level shifters, and the exposed thermal pad on the QFN-32 package supports ground referencing and thermal dissipation. Typical applications include industrial process control and instrumentation, multichannel data acquisition systems, programmable logic controllers, medical instrumentation, and automated test equipment. The 8-channel MUX and sequencer make it particularly attractive for multi-sensor front ends. When designing with this device, allocate adequate settling time between multiplexer channel switches, place the 0.1 µF and 10 µF decoupling capacitors close to the supply pins, and route the analog and digital grounds as star-connected islands meeting at the exposed pad. The internal reference is sufficient for most applications but can be overdriven by an external reference when ultra-low drift is required. This page synthesizes distributor pricing, drop-in alternatives, application circuits, and PCB layout guidance not consolidated in the manufacturer datasheet, giving engineers a single reference for selection and sourcing.
LTC2372HUH-18 - 18-Bit 500ksps 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2372HUH-18 is a low noise, high speed, highly configurable 8-channel 18-bit successive approximation register (SAR) analog-to-digital converter (ADC) that operates from a single 5V supply and delivers up to 500 ksps throughput in a 32-pin QFN (5x5 mm) package. According to the manufacturer datasheet, the part integrates a low-crosstalk 8-channel input multiplexer, an onboard low-drift (20 ppm/°C max) 2.048V temperature-compensated reference, and a single-shot capable reference buffer, making it a complete multi-channel precision data-acquisition front end. A successive approximation register ADC is a sampled-data converter that binary-searches its internal DAC against the analog input over N clock cycles to produce an N-bit code. The SAR architecture is favored for multiplexed multi-channel applications because each conversion is deterministic, has no pipeline latency, and exhibits excellent DC linearity. The LTC2372HUH-18 belongs to the precision SAR ADC product class, which sits hierarchically under analog-to-digital converters, data converters, and signal-chain ICs in the broader power management and analog semiconductor taxonomy. Key differentiating specifications include 100 dB SNR at the 500 ksps maximum sample rate, 8 fully-differential or pseudo-differential input channels routed through a low-crosstalk MUX, 20 ppm/°C maximum reference temperature coefficient, and an SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V, and 5V logic. A configurable sequencer with a depth of 16 automates channel scanning, and the wide 4.75V to 5.25V analog supply tolerance suits industrial 5V rails. The 32-QFN (5x5) plastic package with exposed pad provides low thermal resistance, enabling reliable operation over the -40°C to +125°C extended industrial temperature range. In the typical application circuit, the LTC2372HUH-18 is driven by an external op-amp buffer or directly by a low-impedance sensor network, with a 0.1 µF + 10 µF decoupling scheme on AVDD and an RC anti-alias filter at each MUX input. The reference bypass capacitor (typically 10 µF X7R) is critical to achieve the rated SNR. The serial interface is daisy-chainable, allowing multiple LTC2372-18 devices to share one SPI bus when more than eight channels are required. Typical applications include multi-channel industrial data acquisition, programmable logic controller (PLC) analog input modules, medical instrumentation signal chains, and high-accuracy test and measurement front ends. The wide input range options (fully differential, pseudo-differential unipolar, and pseudo-differential bipolar) also make it suitable for direct connection to load-cell bridges, thermocouples with biasing, and current-shunt monitors. When designing with this part, budget the acquisition time carefully: at 500 ksps the conversion clock must allow 1.7 µs for the ADC core plus the acquisition phase, otherwise throughput drops. Use the BUSY indicator and the internal sequencer to offload channel-management CPU overhead, and verify the reference bypass capacitor is low-ESR to avoid SNR degradation above 100 kHz input frequency. This page synthesizes distributor pricing, verified drop-in alternatives, application examples, and practical design notes that complement the manufacturer datasheet and the parametric summaries found on DigiKey, Mouser, and Octopart.
LTC2372IUH-18 - 18-Bit 500ksps 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2372IUH-18 is a low-noise, high-speed 8-channel 18-bit successive approximation register (SAR) analog-to-digital converter sampling at 500 ksps, housed in a 32-lead 5 mm × 5 mm QFN package. The part operates from a single 5 V analog supply (4.75 V to 5.25 V) and integrates a 2.048 V onboard low-drift (20 ppm/°C max) temperature-compensated reference with a single-shot capable reference buffer, plus a high-speed SPI-compatible serial interface that supports 1.8 V, 2.5 V, 3.3 V, and 5 V logic. The converter is specified for the industrial –40 °C to +85 °C temperature range, denoted by the 'I' suffix in the part number. What is a SAR ADC? A successive approximation register analog-to-digital converter is a precision data-conversion architecture that uses a binary-search algorithm against an internal DAC to determine each code, one bit at a time. SAR ADCs sit in the taxonomy of analog-to-digital converters -> data converters -> signal-chain ICs -> mixed-signal semiconductors, and are prized for low latency, deterministic behavior, no pipeline delay, and excellent DC accuracy - making them the converter of choice for multiplexed multi-channel precision instrumentation, industrial process control, and medical monitoring front ends. The LTC2372IUH-18 achieves 100 dB SNR, and its highly configurable low-crosstalk 8-channel input multiplexer supports fully differential, pseudo-differential unipolar, and pseudo-differential bipolar analog input ranges. A sequencer with a depth of 16 may be programmed through the SPI port to automate channel scanning, and an internal oscillator sets the conversion time, easing external timing constraints. Typical applications include industrial process control and automation, multichannel data acquisition systems, medical instrumentation, and automated test equipment. The wide input range flexibility lets one hardware design serve multiple sensor types - thermocouples, strain gauges, and bipolar transducers - by reconfiguring the MUX rather than redesigning the analog front end. When designing with the LTC2372IUH-18, decouple the AVDD and DVDD rails close to the pins and follow Analog Devices' standard SAR ADC layout recommendations to preserve the 100 dB SNR. Use the internal sequencer rather than discrete channel-selection logic to minimize GPIO usage and to keep channel-to-channel timing deterministic. This page synthesizes distributor pricing, same-family and cross-brand drop-in alternatives, and practical design notes not found on a single manufacturer page, so an engineer can make a sourcing decision in one pass.
LTC2373CUH-18 - 18-Bit, 1Msps, 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2373CUH-18 is a 18-bit, 1 Msps successive-approximation-register (SAR) analog-to-digital converter with eight multiplexed input channels, 100 dB SNR, and an integrated 2.048 V temperature-compensated reference, housed in a 32-pin QFN (5x5 mm) package. It operates from a single 5 V supply and supports a highly configurable, low-crosstalk input MUX that accepts fully differential, pseudo-differential unipolar, and pseudo-differential bipolar input ranges, making it well-suited for multiplexed data acquisition systems. The device delivers 100 dB SNR at the 1 Msps full sampling rate and dissipates only 27 mW typical power. What is a SAR ADC? A successive-approximation-register ADC is a sampled-data converter that uses a binary-search algorithm against an internal DAC to digitize each input sample in N clock cycles (one per bit). SAR ADCs sit at the intersection of precision (typically 12-20 bits) and speed (100 ksps to multi-Msps), and they need no continuous settling current like delta-sigma converters. Within the data converter hierarchy, SAR ADCs are a subfamily of analog-to-digital converters (ADC), which are part of the data acquisition and signal-chain IC family, used wherever a precise snapshot of an analog voltage is required. The LTC2373-18 combines this SAR architecture with a wide-input multiplexed front end, programmable sequencer, and integrated reference to form a complete multi-channel precision front end. Key features include an onboard low-drift (20 ppm/°C max) 2.048 V reference, a single-shot-capable reference buffer, a high-speed SPI-compatible serial interface that supports 1.8 V, 2.5 V, 3.3 V, and 5 V logic, and a programmable sequencer with depth 16. The 32-QFN (5x5) package provides an exposed pad for thermal relief, enabling continuous 1 Msps operation across the -40 °C to +85 °C commercial temperature range. An internal oscillator sets the conversion time, eliminating the need for an external high-frequency clock source. Architecturally, the LTC2373CUH-18 pairs a charge-redistribution DAC array with a precision comparator and a low-noise input front end that is fully differential to reject common-mode disturbances. The integrated reference and reference buffer reduce external BOM cost while preserving low drift across temperature, and the programmable sequencer allows autonomous channel cycling without microcontroller intervention for each conversion, offloading channel-management overhead in high-channel-count systems. Typical applications include industrial process control and programmable logic controller (PLC) analog input modules, multi-channel data acquisition systems, instrumentation and test equipment, medical instrumentation front ends, and precision sensor signal conditioning. The 100 dB SNR and 18-bit resolution make the part particularly attractive where the dynamic range of multiple channels must be captured simultaneously. A key design consideration is channel acquisition time: at full 1 Msps throughput with a fully-differential input, settle the input amplifier to 18-bit accuracy within the acquisition window. For higher-impedance sources, an ADA4528 buffer may be inserted in front of each MUX channel. Always decouple REFOUT with the manufacturer-recommended capacitor network and route CNV, SCK, and SDO as short match-length pairs to avoid aperture jitter from degrading SNR. This page consolidates distributor pricing, drop-in same-package alternatives, comparison data, and practical design notes that go beyond the manufacturer datasheet alone.
LTC2373HUH-16 - 16-Bit 1Msps 8-Ch SAR ADC, 32-QFN | Analog Devices
The Analog Devices LTC2373HUH-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter sampling up to 1 Msps with eight input channels and an integrated low-crosstalk analog multiplexer. It operates from a single 5 V supply, supports fully-differential, pseudo-differential unipolar and pseudo-differential bipolar input ranges, and is housed in a 32-pin QFN (5x5 mm) package (UH suffix). An SAR ADC (successive approximation register analog-to-digital converter) is a type of Nyquist-rate data converter that uses a binary search algorithm with an internal DAC to digitize analog signals in a fixed number of clock cycles. SAR ADCs sit within the broader hierarchy of analog-to-digital conversion technologies alongside flash, pipeline, sigma-delta, and integrating ADCs, occupying a sweet spot between speed and accuracy that makes them the workhorse of industrial instrumentation, motor control, and multi-channel data acquisition systems. Key specifications include 16-bit resolution, 1 Msps throughput, 96 dB SNR, an onboard low-drift 2.048 V temperature-compensated reference (20 ppm/°C max), and a single-shot capable reference buffer. The device also integrates a configurable 8-channel input multiplexer and a sequencer of depth 16 that lets designers cycle through channels automatically without continuous host intervention. The high-speed SPI-compatible serial interface supports 1.8 V, 2.5 V, 3.3 V, and 5 V logic, enabling direct connection to modern microcontrollers, FPGAs, and DSPs without level shifters. The SAR architecture delivers zero-latency conversions, deterministic latency per sample, and no pipeline delay, which is critical in closed-loop control systems, multiplexed data acquisition front-ends, and oversampling applications. The wide input common-mode range and flexible input configurations reduce the need for external signal-conditioning circuits, simplifying BOM and shrinking board area. Typical applications include industrial process control and multi-channel data acquisition systems, programmable logic controller (PLC) analog input modules, medical instrumentation front-ends, optical networking power monitoring, and motor control position/velocity feedback. The combination of 1 Msps speed, 8-channel MUX, and 16-bit accuracy makes the LTC2373HUH-16 particularly well-suited for simultaneous-sampling systems using its internal sequencer. When designing with this device, ensure adequate bypass capacitance on both AVDD and DVDD rails and place the input RC network close to the analog input pins to minimize charge kickback. The internal 2.048 V reference buffer should be enabled only when needed to minimize quiescent current draw in power-sensitive designs. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design guidance not found in the manufacturer datasheet alone, giving engineers an at-a-glance decision matrix for second-source qualification.
LTC2373IUH-18 - 18-Bit, 1Msps, 8-Ch SAR ADC | ADI
The Analog Devices LTC2373IUH-18 is an 18-bit, 1Msps, 8-channel successive-approximation-register (SAR) ADC with 100dB SNR, operating from a single 5V supply and housed in a 32-lead QFN (5x5 mm) package with exposed pad. An SAR ADC (successive-approximation-register analog-to-digital converter) is a type of Nyquist-rate data converter that uses a binary search algorithm to convert an analog voltage into a digital code in N clock cycles. SAR ADCs are valued for low latency, zero-pipeline-delay conversions and are widely used in multiplexed data-acquisition front ends, industrial instrumentation and precision sensor signal chains where deterministic per-sample timing is required. Key features include a highly configurable low-crosstalk 8-channel input multiplexer supporting fully differential, pseudo-differential unipolar and pseudo-differential bipolar analog input ranges; an onboard low-drift 20ppm/°C max 2.048V temperature-compensated reference; a singleshot-capable reference buffer; and a high-speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V and 5V logic. The sequencer with depth 16 enables autonomous channel scanning for cyclic and event-triggered acquisitions. Architecturally, the LTC2373IUH-18 combines a charge-redistribution capacitive DAC core with a precision 2.048V internal reference and dedicated reference-buffer amplifier, achieving 100dB SNR and excellent INL/DNL without external reference components. The wide common-mode input range combined with true-differential switching simplifies front-end signal conditioning for bridge sensors, RTDs and ±10V industrial signals when paired with external attenuators. Typical applications include industrial automation and process control, multichannel data acquisition systems, medical instrumentation, seismic and vibration monitoring, and precision weigh scales. When designing in, allocate adequate bypass capacitance on REF and provide a low-impedance analog ground pour under the exposed pad to maintain SNR at full speed. This page synthesizes distributor pricing, pin-compatible family variants, and practical design notes not found in the manufacturer datasheet.
LTC2381IMS-16 - 16-Bit 250ksps SAR ADC | Analog Devices
The Analog Devices LTC2381IMS-16 is a 16-bit, 250 ksps successive approximation register (SAR) analog-to-digital converter housed in a 16-pin MSOP (I-grade temperature range) package. It operates from a single 2.5V supply, supports a ±2.5V fully differential analog input range, consumes only 3.25 mW, and guarantees ±2 LSB INL max with no missing codes at 16 bits. A SAR ADC is a type of analog-to-digital converter that uses a binary search algorithm through a capacitive DAC and a comparator to digitize an analog input one code-word at a time. SAR ADCs sit in the broader converter hierarchy alongside delta-sigma, pipeline, and flash ADCs, and are favored when designers need a combination of high sampling rate, low latency, and excellent DC linearity. The LTC2381-16 belongs to the precision data converter IC category and serves in the wider role of signal-chain interface between analog sensors/signals and digital processors, MCUs, or FPGAs. Key features include a high-speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V, and 5V logic and a daisy-chain mode for multi-converter synchronization. The device exhibits no cycle latency between conversions, achieves 92 dB SNR (typical), and integrates a low-drift internal reference. The I-grade (–40°C to +85°C) MSOP-16 package is optimized for compact, space-constrained designs. Technically, the LTC2381-16 uses a charge-redistribution capacitive DAC architecture with internal calibration to deliver 16-bit linearity. Its wide common-mode input range simplifies front-end driver design, while the true-differential input rejects common-mode noise from industrial sensor bridges. The combination of low power (3.25 mW), small package, and high throughput makes it well suited to multiplexed multi-channel systems where one ADC serves several analog inputs. Typical applications include industrial process control and instrumentation, seismic data acquisition, portable medical instrumentation, ATE (automatic test equipment) signal capture, and precision weigh scales. The combination of 250 ksps speed and 16-bit accuracy suits control loops where loop latency matters more than absolute noise floor. When designing with this device, ensure adequate input driver bandwidth and a low-impedance reference decoupling network. Use the daisy-chain mode when multiple LTC2381-16 devices must sample simultaneously across a multi-board system. This page synthesizes distributor pricing, drop-in pin-compatible alternatives, and practical design notes that go beyond the manufacturer datasheet to help engineers choose, source, and implement the LTC2381IMS-16 quickly.
LTC2389CUK-16 - 16-Bit 2.5Msps SAR ADC w/ 4.096V Ref | Analog Devices
The Analog Devices LTC2389CUK-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter that samples at up to 2.5 Msps on a single 5V supply, offered in a 48-pin QFN (7x7) package. It integrates a precision 4.096V internal reference with 0.5% initial accuracy and ±20ppm/°C maximum temperature coefficient, plus an internal reference buffer. The pin-configurable analog input supports fully differential ±4.096V, pseudo-differential unipolar 0V to 4.096V, and pseudo-differential bipolar ±2.048V input ranges for direct interface to a wide range of sensor and signal-conditioning front ends. A SAR (Successive Approximation Register) ADC is a precision data-converter type which uses a binary-search charge-redistribution DAC and a comparator to digitize an analog input in N conversion cycles for an N-bit code. SAR ADCs are favored over CMOS pipeline and delta-sigma types where low latency, deterministic single-shot conversion, and wide input common-mode tolerance are required, and they sit hierarchically under the broader ADC category of data-converter ICs. Key features include guaranteed 16-bit resolution with no missing codes, integrated reference and reference buffer, low noise floor of approximately 7.5 ppm RMS, and pin-configurable input spans. The device also provides a flexible LVDS/CMOS-compatible serial or parallel interface and operates over the commercial 0°C to +70°C range, enabling direct PCB streaming for very compact layouts. The architecture combines a capacitive charge-redistribution DAC with an internal precision reference and high-speed comparator, achieving 16-bit performance at multi-MHz speeds without external reference components. A digital filter and on-chip calibration logic minimize integral non-linearity (INL) and differential non-linearity (DNL). This device is intended for industrial process control, multiplexed data acquisition systems, portable or point-of-use systems. The wide analog input range suits ±10V systems through balanced PWM outputs of a front-end driver while preserving full 16-bit dynamic range. When designing with this device, ensure the input signal bandwidth is limited to less than the Nyquist frequency (1.25 MHz at 2.5 Msps) and that source impedance is below 50Ω to avoid conversion errors. Decoupling must include 10µF and 0.1µF ceramic capacitors placed within 5mm of each supply pin, with a 4.7µF reference bypass capacitor. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found on the manufacturer datasheet, with all specs cross-checked against the verified Analog Devices product page and current DigiKey/Mouser listings.
LTC2389HLX-18 - 18-Bit 2.5Msps SAR ADC 99.8dB SNR | Analog Devices
The Analog Devices LTC2389HLX-18 is a low-noise, high-speed 18-bit successive approximation register (SAR) analog-to-digital converter sampling at up to 2.5 Msps, packaged in a 48-lead LQFP (7x7 mm). It achieves 99.8 dB SNR and integrates a precision internal 4.096 V reference with ±20 ppm/°C maximum temperature coefficient, plus an internal reference buffer for single-5V-supply operation. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a precision data converter that uses a binary-search algorithm and an internal capacitive DAC to resolve an analog input into a digital code. SAR ADCs combine high resolution with low latency and zero pipeline delay, occupying the tier between flash converters (fastest, lowest resolution) and sigma-delta ADCs (highest resolution, slowest). They are the workhorse of precision industrial instrumentation, medical imaging, and high-speed control loops. Key features include pin-configurable analog input ranges — fully differential ±4.096 V, pseudo-differential unipolar 0 V to 4.096 V, and pseudo-differential bipolar ±2.048 V — allowing direct interface to multiple signal-chain formats without external level shifting. The device delivers 18-bit no-missing-codes performance, a wide common-mode range, and on-chip reference buffer that simplifies the analog front-end. Internally, the LTC2389-18 uses a charge-redistribution capacitive DAC with a precision thin-film resistor network for laser-trimmed linearity, and an internal oscillator that eliminates the need for an external clock. The internal reference and reference buffer together minimize external component count while preserving 99.8 dB SNR across the full operating temperature range. Typical applications include high-speed precision data acquisition systems, medical imaging front-ends, vibration and acoustic analysis, spectrum and FFT analysis, and process control loops. The wide input range makes it suitable for direct connection to bridge sensors, audio CODEC front-ends, and industrial 4–20 mA loop receivers after appropriate signal conditioning. When designing with this device, keep analog and digital grounds separated and joined at a single star point under the IC. Place the 10 µF input decoupling capacitor and reference bypass capacitor as close as possible to the supply and REFIN pins to achieve the rated 99.8 dB SNR. Allow sufficient quiet settling time between conversions when operating near full throughput. This page synthesizes distributor stock, cross-reference alternatives, and design notes not found in the bare datasheet, providing an engineer-ready summary tailored for high-precision SAR ADC selection and PCB bring-up.
LTC2389ILX-16 - 16-Bit 2.5Msps SAR ADC | Analog Devices
The Analog Devices LTC2389ILX-16 is a 16-bit, 2.5 Msps successive approximation register (SAR) analog-to-digital converter housed in a 48-pin LQFP (7x7 mm) package. Operating from a single 5V supply, the device supports pin-configurable input ranges including fully differential (±4.096 V), pseudo-differential unipolar (0 V to 4.096 V), and pseudo-differential bipolar (±2.048 V) modes, giving system designers flexibility for direct connection to a wide range of sensors and signal-conditioning front ends. A SAR ADC is a type of data converter that uses a binary-search successive-approximation algorithm against an internal precision DAC to digitize an analog input in N clock cycles for N-bit resolution. SAR ADCs occupy a position in the broader converter hierarchy between flash converters (fastest, lowest resolution) and sigma-delta converters (highest resolution, slower), offering an attractive balance of speed, resolution, and latency for multiplexed data-acquisition and industrial-instrumentation systems. The LTC2389 family specifically targets low-noise, high-speed, multiplexed applications where a single ADC serves many channels through an external MUX. Key features include guaranteed 16-bit no-missing-codes performance, low noise of 0.6 LSB RMS (transition noise) thanks to on-chip oversampling capability, an internal 4.096 V reference with 0.5% initial accuracy and ±20 ppm/°C maximum temperature coefficient, and a digital gain compression (DGC) mode that eliminates the need for a negative supply on the analog input. The wide-input-common-mode range simplifies front-end signal conditioning, and the LVDS-compatible serial interface supports high-speed board-to-board data transfer. The architecture combines a charge-redistribution capacitive DAC with an internal reference buffer, providing a fast settling acquisition path and transparent latency of one conversion cycle. On-chip digital filtering and an internal oscillator reduce external component count, while the SPI-compatible serial LVDS I/O simplifies FPGA/ASIC interfacing. The 48-LQFP package is footprint-compatible across the LTC2389-16, LTC2389-18, and related family members. Typical applications include industrial process control, multiplexed data acquisition systems, medical imaging front ends, instrumentation and test equipment, and high-speed ATE systems. The combination of low noise, wide input range, and high throughput makes the part especially well suited to photodiode, transducer, and bridge-sensor signal chains. When designing with this device, pay close attention to PCB layout: the analog input traces must be differential and length-matched, the reference decoupling must use a low-ESR 10 µF ceramic directly at the REFCAPA/REFCAPB pins, and a clean analog ground island should be maintained around the ADC. When the input is configured in pseudo-differential mode, drive the common-mode pin (COM) with a low-impedance source to preserve linearity. This page synthesizes distributor pricing, drop-in alternatives, application notes, and design considerations that are not aggregated on any single manufacturer or distributor product page.
LTC2389IUK-16 - 16-Bit 2.5Msps SAR ADC | Analog Devices
The Analog Devices LTC2389IUK-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter that samples at up to 2.5 Msps and is housed in a 48-pin QFN (7x7 mm) package. The Industrial-grade IUK-16 variant operates from a single 5V supply, supports pin-configurable inputs including fully differential (±4.096 V), pseudo-differential unipolar (0V to 4.096V), and pseudo-differential bipolar (±4.096V) ranges, and achieves 16-bit resolution with no missing codes at the full throughput. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a sampled-data converter architecture that performs one binary search per clock cycle using an internal DAC and comparator. SAR ADCs are favored for instrumentation, motor control, and data acquisition because they combine deterministic latency (one conversion = N clock cycles, where N is the bit count), excellent DC accuracy, low latency, and low power consumption versus pipelined or delta-sigma converters. The LTC2389-16 belongs to the precision SAR converter category of mixed-signal data-acquisition ICs. Key features include ±0.5 LSB (max) INL and ±0.5 LSB (max) DNL, a wideband internal reference (4.096V ±0.5% initial accuracy with ±20 ppm/°C maximum temperature coefficient), an internal reference buffer, and a high-speed SPI-/QSPI-/MICROWIRE-compatible serial interface with a configurable 16-/8-bit bus width. The device accepts a low-drift external overdrive on the reference pin for ratiometric measurements, while a digital gain compression function provides ±4.096 V true bipolar input range from a single 5V supply. The architecture employs a charge-redistribution switched-capacitor DAC core fed from a precision bandgap reference buffer, with on-chip calibration of linearity errors and a proprietary switching scheme that minimizes harmonic distortion. The wide common-mode input range and 92 dB common-mode rejection at 100 kHz simplify front-end signal conditioning, while the low aperture delay and deterministic latency support multiplexed multi-channel sampling. Typical applications include industrial process control and data acquisition, instrumentation and motor control loops, digital instrumentation position sensors, ATE (Automatic Test Equipment) boards, optical networking control loops, and precision weigh scales. The 2.5 Msps throughput, low latency, and 16-bit no-missing-codes performance make it well suited to closed-loop control applications where latency, accuracy, and code integrity dominate. Designers should place the 1 µF reference bypass capacitor and 10 µF input RC network as close to the analog inputs as possible to preserve linearity at full throughput; inadequate decoupling or reference bypassing will degrade SNR. The 48-pin QFN exposed pad must be soldered to a continuous ground plane for thermal dissipation and electrical reference. This page consolidates distributor stock and pricing snapshots, a same-brand drop-in alternatives list, package-aware comparison tables, and practical decoupling/grounding design notes that supplement the manufacturer datasheet.
LTC2389IUK-18 - 18-Bit 2.5Msps SAR ADC | Analog Devices
The Analog Devices LTC2389IUK-18 is a low noise, high speed 18-bit successive approximation register (SAR) analog-to-digital converter (ADC) sampling at 2.5 Msps and housed in a 48-lead QFN (7x7 mm) package. Operating from a single 5 V supply, the device supports pin-configurable fully differential (±4.096 V), pseudo-differential unipolar (0 V to 4.096 V) and pseudo-differential bipolar (±2.048 V) analog input ranges, allowing one ADC to interface with multiple signal-chain formats without hardware changes. A SAR ADC is a successive-approximation-register analog-to-digital converter that performs a binary search across an internal capacitive DAC to resolve each conversion in N clock cycles. SAR ADCs sit in the data-converter hierarchy between flash and delta-sigma converters, combining low latency (no digital filter pipeline delay), high DC accuracy, and reasonable sampling rates, which makes them the topology of choice for multiplexed data acquisition, control loops, and instrumentation front ends. Key features include 99.8 dB SNR, ±2 LSB INL (max), no missing codes at 18 bits, an internal precision 4.096 V reference with ±20 ppm/°C max drift, an internal reference buffer, and a serial LVDS digital interface. The pin-configurable analog input range and integrated reference buffer minimize external component count, while the 5 V single-supply operation simplifies analog front-end and digital host power trees. The 7x7 mm QFN-48 package provides low thermal resistance and a small PCB footprint for dense multi-channel systems. The architecture uses a charge-redistribution CDAC sampling front end that achieves 99.8 dB SNR and 20-bit RMS noise performance through careful analog design, low-jitter clocking, and a dedicated reference buffer. The -I temperature grade (industrial) operates from -40 °C to +85 °C, and the internal reference voltage is decoupled internally; the datasheet recommends external bypass capacitors for full noise performance. Typical applications include high-speed multiplexed data acquisition, instrumentation, medical imaging, vibration analysis, industrial process control, and ATE (automatic test equipment) signal capture. The wide input-range configurability suits multi-format sensor interfaces and precision measurement front ends. When designing with the LTC2389IUK-18, place the internal reference bypass capacitor as close to the REFCAP pin as possible, keep analog and digital grounds separated, and use a low-jitter LVDS clock source to avoid degrading SNR. Because the SAR architecture is sensitive to input-bandwidth and settling-time limits, pay close attention to driving amplifier selection and RC anti-alias filter design. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes for the LTC2389IUK-18 not found in a single manufacturer document, helping engineers select and qualify the part quickly.
LTC2391CLX-16 - 16-Bit 250ksps SAR ADC, 94dB SNR | Linear Technology
The Analog Devices LTC2391CLX-16 is a 16-bit, 250 ksps successive-approximation-register (SAR) analog-to-digital converter with 94 dB SNR, packaged in a 48-pin LQFP (7x7 mm). It integrates a precision internal reference (0.5% initial accuracy, +/-20 ppm/degree C max temperature coefficient) and accepts a true bipolar +/-VREF differential input range, simplifying system signal-chain design by removing external reference circuitry. Operating from a single 5 V supply, the device delivers full throughput with no cycle latency in both parallel and serial interface modes. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a precision data-conversion topology that performs a binary search against an internal DAC to digitize an analog input one bit at a time, typically completing a conversion in N clock cycles for an N-bit device. Within the broader signal-chain taxonomy, a SAR ADC sits under ADC (analog-to-digital converter) -> data converter -> mixed-signal IC -> semiconductor IC. SAR converters are favored over delta-sigma for multiplexed or multi-channel data acquisition where low latency and deterministic per-sample throughput matter more than absolute resolution beyond 18-20 bits. Key features of the LTC2391CLX-16 include 94 dB SNR at the 250 ksps maximum sampling rate, an integrated 2.5 ppm/degree C (max) reference with 0.5% initial accuracy, true bipolar differential inputs spanning 4 * VREF, hardware-selectable parallel or serial (SPI-/QSPI-/MICROWIRE-compatible) interface, and dedicated nap and sleep power-down modes. The differential architecture inherently rejects common-mode noise and switching-rail interference from upstream analog front ends. Architecture-wise, the LTC2391CLX-16 uses a charge-redistribution capacitive DAC core combined with an on-chip low-drift bandgap reference, sampled by a high-bandwidth input stage. The combination achieves 94 dB SNR while dissipating only 95 mW at full 250 ksps throughput, dropping below 12 mW in nap mode and below 1 microamp in sleep mode for battery-powered or duty-cycled instrumentation. Typical applications include industrial process control and high-speed data acquisition, medical instrumentation front ends, seismic and vibration monitoring, ATE (automatic test equipment) digitizers, and precision multi-channel multiplexed systems where its zero-cycle-latency architecture eliminates the group delay of pipeline or delta-sigma converters. When designing with the LTC2391CLX-16, place the analog and digital ground planes as a single solid pour under the device, decouple OVDD and AVDD with separate 10 microfarad + 0.1 microfarad ceramic pairs within 5 mm of the pins, and use a 100 ohm series resistor on each digital output to damp ringing on the parallel bus. Avoid routing the conversion clock near the analog inputs to preserve the 94 dB SNR floor. This page synthesizes distributor pricing, drop-in pin-compatible alternatives, application guidance, and design notes not found in the manufacturer datasheet.
LTC2391HLX-16 - 16-Bit 250ksps SAR ADC | Analog Devices
The Analog Devices LTC2391HLX-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter sampling at 250 ksps, housed in a 48-pin LQFP (7x7 mm) package. It operates from a single 5 V supply and supports a large fully differential input range of ±4.096 V, achieving 94 dB SNR. The -16 suffix denotes the 16-bit resolution; -HLX denotes the LQFP-48 package with the automotive H-grade temperature range. A SAR ADC is a type of analog-to-digital converter that performs a binary search through an internal capacitive DAC to determine the digital output code one bit at a time per conversion clock. SAR ADCs combine low latency, deterministic throughput, and excellent noise performance, making them the preferred topology for multiplexed data acquisition, motor control feedback loops, and precision instrumentation. Within the broader taxonomy, the LTC2391HLX-16 belongs to the precision ADC -> data converter -> signal chain IC family of mixed-signal semiconductors. Key features include 16-bit no-missing-codes performance, 94 dB SNR, ±4.096 V true-differential inputs, integrated reference and reference buffer, and selectable parallel or serial (SPI-compatible) interface. The internal 4.096 V reference is trimmed for low drift, eliminating external reference components in many designs. The wide common-mode input range and high common-mode rejection allow direct connection to bridge sensors, current shunts, and high-impedance signal sources without active front-end conditioning. Architecturally, the LTC2391HLX-16 uses a charge-redistribution capacitive DAC and on-chip calibration to achieve INL of ±1 LSB and excellent DC accuracy. Its single-shot and burst conversion modes allow trade-offs between latency and channel density. Compared with delta-sigma ADCs of similar noise, it offers dramatically lower latency (one conversion period versus many oversampling cycles), which simplifies system timing in closed-loop control. Typical applications include industrial process control, weigh scales, instrumentation, motor control current sensing, multiplexed data acquisition systems, and precision sensor signal chains. The differential ±4.096 V range maps cleanly to ±10 V reduced inputs and 4 mA-to-20 mA loop-powered sensor outputs. When designing with this part, observe the analog and digital ground separation recommended in the datasheet typical application, keep analog input traces short and symmetric, and bypass both AVDD and DVDD with 10 µF ceramic plus 0.1 µF decoupling placed as close as possible to the supply pins. This page synthesizes distributor pricing, drop-in pin-compatible alternatives from the same Linear Technology/Analog Devices 2391 family, and practical design notes that complement, but do not replace, the manufacturer's datasheet.
LTC2391ILX-16 - 16-Bit 250ksps SAR ADC, 48-LQFP | Analog Devices
The Analog Devices LTC2391ILX-16 is a 16-bit, 250 ksps successive-approximation-register (SAR) analog-to-digital converter (ADC) with 94 dB SNR, housed in a 48-pin LQFP (7x7 mm) package. The part integrates a precision internal reference rated 0.5% initial accuracy with ±20 ppm/°C maximum temperature coefficient, removing the need for an external reference in most precision signal-chain designs. It supports both parallel and serial host interfaces with no cycle latency between conversions. A SAR ADC is a class of Nyquist-rate data converter that uses a binary-search algorithm against a precision DAC to resolve the input voltage in N clock cycles for an N-bit output. SAR ADCs are valued for their deterministic latency, low power, and excellent DC accuracy — they belong to the data-converter hypernym hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. Key features of the LTC2391ILX-16 include 94 dB SNR, ±2 LSB INL (typical), true-differential inputs with wide common-mode range, an internal oscillator, and a hardware-mode configuration that allows standalone operation. The device accepts a single 5 V analog rail and provides a low digital supply current, making it well-suited to dense multi-channel instrumentation boards. Architecturally, the LTC2391 uses a charge-redistribution capacitive DAC array with a high-precision thin-film resistor reference network, achieving 16-bit resolution without calibration. The internal reference buffer isolates the reference from switching transients, contributing to the wide 94 dB SNR and clean THD performance across audio-band signal frequencies. Typical applications include industrial process-control data acquisition modules, weigh scales, precision instrumentation, portable medical diagnostics, and seismic-data front-end digitizer card. With 250 ksps throughput and no pipeline latency, the part is also appropriate for closed-loop control loops where conversion determinism matters. When designing with this part, ensure the analog input network respects the 5 V common-mode range and that the reference decoupling capacitor is placed within 5 mm of the REF pin. For multi-board synchronization, drive the CNTR pin from a low-jitter source, and decouple AVDD/DVDD/OVDD rails separately to prevent digital switching noise from coupling into the SAR comparator. This page synthesizes distributor pricing, drop-in same-package alternatives (LTC2391CLX-16 from the same datasheet family), and practical PCB-level design notes not assembled in the manufacturer datasheet alone.
LTC2391IUK-16 - 16-Bit 250ksps SAR ADC, ±4.096V Input | Analog Devices
The Analog Devices LTC2391IUK-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter that operates from a single 5V supply and samples at 250 ksps. Packaged in a 48-lead QFN (7x7 mm), the part features a true bipolar ±4.096V fully differential input range, ±2 LSB INL max, no missing codes at 16 bits, and 94 dB SNR (typical). The -IUK variant carries the industrial (-40C to +85C) operating temperature grade. A SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm with a high-precision comparator and a switched-capacitor DAC to resolve one bit per clock cycle. SAR ADCs occupy a middle tier in the converter hierarchy above flash ADCs (lower latency, lower power) and below delta-sigma ADCs (higher dynamic range, slower). They are widely deployed in industrial process control, instrumentation, and precision data-acquisition front-ends where deterministic latency and wide input common-mode ranges are required. Key features of the LTC2391IUK-16 include an integrated precision reference (0.20% initial accuracy and 20 ppm/C max temperature coefficient), a flexible SPI-compatible serial interface, single-cycle conversion with no latency, and a wide analog input common-mode range that simplifies front-end signal conditioning. The differential input stage provides excellent common-mode rejection for noisy industrial settings. The 48-QFN package's exposed pad provides a low thermal-resistance (~28 C/W) path that supports reliable operation at full 250 ksps throughput. The device operates from a single 5V analog supply (VDD) and a 5V digital supply (OVDD), with the OVDD level setting the logic output compliance. The internal 4.096V reference is trimmed for low drift, eliminating the need for an external reference in most designs. The architecture uses a charge-redistribution DAC and on-chip calibration registers to achieve the datasheet INL and DNL specifications without user-side calibration. Typical applications include precision industrial process control, seismic and instrumentation front-ends, ATE (Automatic Test Equipment) digitizers, and high-accuracy weigh scales. The wide ±4.096V differential input range allows direct digitization of bridge sensors, thermocouple-amplifier outputs, and ±10V signals after a simple resistive divider. When designing with this part, place the 10uF bypass capacitors as close as possible to the REFCAP, AVDD, and OVDD pins and connect the exposed pad to a solid analog ground plane. Maintain a clean differential trace layout for IN+ and IN-; imbalance directly degrades the 94 dB SNR. For best linearity, follow Analog Devices' recommended footprint and use guard rings around sensitive analog nodes.
LTC2392CUK-16 - 16-Bit 500ksps SAR ADC | Analog Devices
The Analog Devices LTC2392CUK-16 is a low noise, high speed 16-bit successive approximation register (SAR) analog-to-digital converter with 500 ksps throughput and 94 dB SNR, offered in a 48-pin QFN (UK-16) package. Operating from a single 5 V supply, the device accepts a large ±4.096 V fully differential input range, making it suitable for high-performance applications requiring maximum dynamic range. The device is specified over the commercial 0 °C to 70 °C temperature range, indicated by the CUK suffix. A successive approximation register (SAR) ADC is a sampling converter that uses a binary-search algorithm against an internal capacitive DAC to produce a digital output in N conversion cycles for N-bit resolution. SAR ADCs combine low latency, deterministic behavior, and typically excellent DC accuracy with moderate-to-high sampling rates, sitting in the signal chain between conditioning front-ends and digital processors. The LTC2392-16 family sits above general-purpose 12-/14-bit SAR parts and competes with pipeline ADCs at moderate speeds, where its single-supply simplicity and lack of pipeline latency give it an edge in multiplexed and multiplexed-channel instrumentation. Key features include a precision internal reference with 0.5 % initial accuracy and a guaranteed ±20 ppm/°C maximum temperature coefficient, an internal clock, and selectable parallel or serial digital interface. Both interface options are available without cycle latency, enabling readback in the same conversion cycle, which simplifies FPGA and microcontroller interfacing. The architecture combines a charge-redistribution 16-bit DAC, a high-speed low-noise comparator, and an internal 4.096 V reference. The differential input structure and integrated reference deliver the 94 dB SNR typical of high-performance SAR converters without requiring an external low-noise reference, simplifying board design and reducing BOM cost. Typical applications include industrial process control and data acquisition, multi-channel instrumentation, motor control feedback, and precision sensor signal chains where ±10 V or 4-20 mA inputs must be digitized at moderate rates. The wide ±4.096 V differential input range also suits medical instrumentation and weigh scales. The combination of 16-bit no-latency conversion and 500 ksps speed makes the device well suited to multiplexed multi-channel systems. When designing with this part, place the bypass and reference capacitors as close as possible to the supply and REFCAP pins to preserve AC performance. Both CNV and clock traces should be routed away from analog input traces to minimize digital coupling into the conversion result. This page synthesizes distributor pricing, drop-in alternatives, and applied design guidance not bundled in the manufacturer datasheet, with all data points cited against their source.
LTC2392ILX-16 - 16-Bit 500ksps SAR ADC, 94dB SNR | Analog Devices
The Analog Devices LTC2392ILX-16 is a 16-bit, 500ksps successive approximation register (SAR) analog-to-digital converter with 94dB SNR, supplied in a 48-lead LQFP (7x7 mm) package. It operates from a single 5V supply and supports a true bipolar ±4.096V fully differential input range, delivering a maximum dynamic range of more than 19 effective bits at the full 500k samples per second throughput. An internal precision reference is included with a guaranteed 0.5% initial accuracy and a maximum temperature coefficient of ±20 ppm/°C, eliminating the need for an external reference component in most designs. A SAR (Successive Approximation Register) ADC converts a single analog sample to a digital code using a binary-search algorithm against an internal DAC, trading flash speed for high resolution with low power and zero pipeline latency. The LTC2392-16 sits in the precision data-acquisition tier of Analog Devices' ADC portfolio — between general-purpose successive-approximation parts and the higher-speed pipelined converters — and is widely deployed where accurate capture of slowly changing or wide-bandwidth signals is required without sacrificing throughput. Key feature highlights include simultaneous SPI-compatible serial and parallel data interfaces with no cycle latency, hardware-selectable nap and sleep power-down modes that reduce quiescent current to nanoampere levels between conversions, and fast full-scale settling that allows the device to react promptly to large input steps after power-down. The combination of ±4.096V true-differential inputs, internal reference, and 110 mW typical dissipation at 500ksps makes the part well suited to industrial process-control and instrumentation front-ends. The 48-pin LQFP-48 (7x7 mm) footprint is compatible with the LTC2392 family, and a commercial-grade variant (LTC2392CLX-16) covers the 0 °C to +70 °C window for cost-sensitive applications. Typical applications include high-speed industrial process monitoring, precision weigh scales, instrumentation and data acquisition boards, and motor control feedback loops. The wide bipolar input range and fast settling also suit the part for use in multiplexed channel scanning and medical instrumentation front-ends. When designing in the LTC2392ILX-16, pay attention to input common-mode and reference-decoupling layout; place 10 µF bypass capacitors as close as possible to the REFP, REFN, and VDD pins to realize the rated 94 dB SNR.
LTC2393CUK-16 - 16-Bit 1Msps SAR ADC 94dB SNR | Analog Devices
The Analog Devices LTC2393CUK-16 is a 16-bit, 1Msps successive-approximation-register (SAR) analog-to-digital converter (ADC) with 94dB SNR, housed in a 48-pin QFN (7x7) UK package. It accepts a single fully-differential analog input, integrates a precision internal reference (0.5% initial accuracy, ±20ppm/°C max temperature coefficient), and supports both parallel and serial interface modes with no cycle latency. An SAR ADC is a successive-approximation-register analog-to-digital converter, a class of data converter that uses a binary-search algorithm and an internal capacitive DAC to resolve each sample in a fixed number of clock cycles. In the broader signal-chain hierarchy, SAR ADCs sit between flash converters (faster but lower resolution) and sigma-delta ADCs (higher resolution but slower) and are favored for multiplexed data acquisition, motor control, and instrumentation loops where deterministic latency, moderate resolution, and high throughput are all required. Key features of the LTC2393CUK-16 include ±5V true bipolar input range with 94dB SNR and 16-bit no-missing-codes, an internal 4.096V reference that can be overdriven by an external reference, and wide 4.5V to 5.5V analog supply operation. The device also offers a flexible digital interface (parallel or serial LVCMOS), a low-drift internal reference, and a per-channel input span of ±VREF centered on common mode. Architecturally the converter uses a charge-redistribution SAR core that resolves 16 bits in a single conversion cycle, enabling 1Msps throughput with no pipeline delay. The internal reference is a low-noise bandgap with curvature compensation, and the analog input front-end is a true fully-differential switched-capacitor sampler with integrated input transient buffers. This topology makes the part tolerant of source-impedance variation and immune to charge kickback. Typical applications include high-speed industrial data acquisition, medical imaging front-ends, motor control current sensing, multichannel multiplexed instrumentation, and automated test equipment (ATE) digitizer cards. The wide input range simplifies signal conditioning when interfacing directly to ±10V sensors with external resistor dividers. When designing with this ADC, place the analog and digital ground planes in a star pattern and decouple the analog supply with a 10uF ceramic plus a 0.1uF capacitor placed within 5mm of the AVdd pin. Source-impedance above 50 ohms will degrade THD, so add a wideband buffer such as the LT6203 directly in front of the inputs. This page synthesizes distributor pricing, same-family alternatives, and practical design notes that go beyond the manufacturer datasheet to accelerate your LTC2393CUK-16 selection and bring-up.
LTC2393HLX-16 - 16-Bit 1Msps SAR ADC, 94dB SNR, 48-LQFP | ADI
The Analog Devices LTC2393HLX-16 is a 16-bit, 1Msps successive approximation register (SAR) analog-to-digital converter with 94.2 dB SNR (typical), housed in a 48-pin LQFP (7x7 mm) package. It operates from a single 5V analog supply and accepts a wide ±4.096V fully differential input range, maximizing dynamic range for high-performance signal acquisition. The device achieves ±2 LSB INL maximum with no missing codes at 16 bits, guaranteeing true 16-bit conversion integrity. What is a SAR ADC? A successive approximation register ADC is a precision data converter that uses a binary search algorithm through an internal DAC to digitize an analog input. SAR ADCs occupy the middle ground between high-speed flash converters and ultra-high-resolution delta-sigma ADCs, delivering low-latency, deterministic conversion with no pipeline delay. They sit within the broader hierarchy: data converter -> ADC -> SAR ADC -> precision mixed-signal IC, and are widely preferred when both speed and DC accuracy are required simultaneously. Key features include an integrated precision reference with 0.5% initial accuracy and ±20 ppm/°C maximum temperature coefficient, eliminating the need for an external reference. The part supports both parallel and serial interface modes with no cycle latency, and provides true 16-bit no-missing-codes performance across the entire operating range. Internal low-noise architecture achieves 94.2 dB typical SNR at the full 1Msps throughput. The LTC2393HLX-16 architecture combines a charge-redistribution capacitive DAC with a high-speed comparator and SAR logic, all clocked internally for low jitter. The differential input structure rejects common-mode noise and harmonic distortion, and the wide ±4.096V input range supports direct interfacing to industrial ±10V-scaled signals after attenuation. Single 5V operation simplifies power tree design in mixed-signal systems. Typical applications include precision industrial process control, medical instrumentation, seismic data acquisition, high-speed multichannel data acquisition systems, and ATE (automatic test equipment). The wide input range and high SNR make it well suited for vibration analysis, sonar front-ends, and spectrum analyzer input stages. When designing with this device, ensure the analog input common-mode voltage is biased near AVDD/2 and that the RC charge kick-back at the input is absorbed with an external buffer such as the LT6350. Decouple AVDD and DVDD independently with low-ESR ceramic capacitors placed close to the supply pins. This page synthesizes distributor pricing, drop-in SAR ADC alternatives, and practical design notes not found in the manufacturer datasheet alone.