10AX115N4F45E3LG vs 10AX115N4F40I3SG Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci 10AX115N4F45E3LG disebabkan oleh Intel dan 10AX115N4F40I3SG disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | 10AX115N4F45E3LG | 10AX115N4F40I3SG |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements (LE) | 1,150,000 | 1,150,000 |
| Adaptive Logic Modules (ALM) | 427,200 | [DATA_NEEDED: ALM count] |
| Embedded Memory | 68,857,856 bits (8,532 Kbits per M20K block) | — |
| DSP Blocks | 3,376 (variable-precision, 18x19 multipliers) | [DATA_NEEDED: DSP block count] |
| Maximum User I/O Pins | 768 | — |
| Transceivers | Up to 96 channels at up to 17.4 Gbps | — |
| Hard Processor System | Dual ARM Cortex-A9 MPCore | — |
| Memory Interfaces | DDR4, DDR3, QDR-IV, RLDRAM III (hard controller) | — |
| PCIe Hard IP | PCIe Gen3 x8 (hard IP block) | — |
| PLLs | 24 | — |
| Process Technology | TSMC 20nm | — |
| Kemasan | 1932-ball FCBGA (F45, 45x45 mm) | 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch |
| Suhu Operasi | Extended (E) industrial grade per ordering code | -40C to +100C (Industrial) |
| Status RoHS | Compliant | Compliant |
| Jenis Pemasangan | Surface Mount (BGA) | Surface Mount (BGA) |
| Aras MSL | [DATA_NEEDED: MSL rating] | 3 (per JEDEC J-STD-020) |
| Voltage Rails | Core 0.9 V, transceiver 1.0/1.1 V, I/O bank-dependent | — |
| Embedded Memory Bits | — | 68,857,856 |
| Maximum User I/O | — | 600 |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |
| Maximum Transceiver Data Rate | — | 17.4 Gbps |
| Process Node | — | 20 nm |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCC core voltage] |
| Configuration | — | Serial, Parallel, and Avalon-ST supported |
| Hardened IP | — | PCIe Gen3, 100G Ethernet MAC (per Quartus IP library) |
| Device Family Position | — | Mid-range 20 nm transceiver FPGA |