10CL055YU484I7G vs 10CL040YU484I7G Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci 10CL055YU484I7G disebabkan oleh Altera dan 10CL040YU484I7G disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | 10CL055YU484I7G | 10CL040YU484I7G |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Family | Cyclone 10 LP | Cyclone 10 LP |
| Logic Elements | 55,856 | — |
| Embedded Memory Bits | 2,396,160 bits | — |
| M9K Memory Blocks | 260 | — |
| Maximum User I/Os | 321 | — |
| DSP Blocks (18x18 multipliers) | 156 | — |
| PLLs | 4 | — |
| Global Clock Networks | 20 | — |
| Process Technology | 60 nm low-power CMOS | TSMC 60 nm low-power |
| Kemasan | 484-ball UBGA (Ultra FineLine BGA), 19 mm x 19 mm | 484-pin UBGA (Ultra FineLine BGA) |
| Speed Grade | -7 (I7, industrial) | — |
| Suhu Hubungan Operasi | -40C to +100C | — |
| Core Voltage (VCCINT) | 1.0V (typical), 1.1V nominal | — |
| I/O Voltage (VCCIO) | 1.2V to 3.3V (bank-dependent) | — |
| Configuration Modes | JTAG, AS, PS, FPP | — |
| LVDS Data Rate | Up to 875 Mbps per channel | — |
| Status RoHS | Compliant | Compliant |
| Aras MSL | 3 (per JEDEC J-STD-020) | — |
| Logic Elements (LE) | — | 39,600 |
| Configurable Logic Blocks (CLB) | — | 2,475 |
| Embedded Memory | — | 1,161,216 bits (M9K blocks) |
| Embedded 18x18 Multipliers | — | 66 |
| Maximum User I/O | — | 325 |
| General-Purpose PLLs | — | 4 |
| Core Voltage | — | 1.0 V to 1.2 V |
| Suhu Operasi | — | -40 C to +100 C (Industrial) |
| Ball Pitch | — | 0.8 mm |
| Jenis Pemasangan | — | Surface Mount |
| Configuration Mode | — | JTAG / AS / PS |
| Supply Form | — | Tray |