5CSEBA2U19I7SN vs 5CSEBA2U19I7N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci 5CSEBA2U19I7SN disebabkan oleh Altera dan 5CSEBA2U19I7N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | 5CSEBA2U19I7SN | 5CSEBA2U19I7N |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Device Type | Cyclone V SE FPGA system-on-chip (SoC) | — |
| Processor Core | Single ARM Cortex-A9 MPCore | — |
| Debug Technology | CoreSight | — |
| Logic Elements | 25K logic elements | 25K |
| Device Frequency | 800 MHz | — |
| I/O Count | 240 I/O | — |
| Kemasan | 484-UBGA | 484-UBGA (19x19 mm) |
| Package Dimensions | 19 mm x 19 mm | — |
| FPGA Architecture | Cyclone V SE | — |
| Jenis Pemasangan | Surface mount | Surface Mount (BGA) |
| Integrated Processor | Yes | — |
| Logic Technology | Field-programmable gate array | — |
| Device Category | Embedded system-on-chip FPGA | — |
| Status RoHS | unknown | Compliant |
| REACH Status | unknown | — |
| AEC-Q100 Status | unknown | — |
| Gambaran Suhu Operasi | [DATA_NEEDED: operating temperature range] | — |
| Tegangan Pemberi Arus | [DATA_NEEDED: supply voltage range] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Jenis Ingatan | [DATA_NEEDED: memory type and capacity] | — |
| Family | — | Cyclone V SE SoC FPGA |
| HPS | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Clock Frequency | — | 800 MHz |
| Embedded Memory | — | 1,400 Kbits |
| DSP Blocks (18x18 Multipliers) | — | 66 |
| User I/O Pins | — | 145 |
| LVDS Support | — | Up to 1.25 Gbps |
| Process Technology | — | 28 nm TSMC low-power |
| Suhu Operasi | — | -40C to +100C (Industrial) |
| Voltage - Input (Max) | — | 1.1 V core |
| Peripherals | — | USB 2.0 OTG, Gigabit Ethernet, CAN, UART, SPI, I2C, NAND/NOR flash controllers |
| HPS-FPGA Interconnect | — | AXI bridges (3 master / 3 slave), FPGA-to-HPS SDRAM, DMA |