5CSEBA2U19I7SN vs 5CSEBA2U19I7N Karşılaştırma
Ayrıntılı yan yana karşılaştırma 5CSEBA2U19I7SN tarafından Altera ve 5CSEBA2U19I7N tarafından IntelAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Özellik Karşılaştırması
| Parametre | 5CSEBA2U19I7SN | 5CSEBA2U19I7N |
|---|---|---|
| Marka | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Yaşam Döngüsü Durumu | Aktif | Aktif |
| Device Type | Cyclone V SE FPGA system-on-chip (SoC) | — |
| Processor Core | Single ARM Cortex-A9 MPCore | — |
| Debug Technology | CoreSight | — |
| Logic Elements | 25K logic elements | 25K |
| Device Frequency | 800 MHz | — |
| I/O Count | 240 I/O | — |
| Paket | 484-UBGA | 484-UBGA (19x19 mm) |
| Package Dimensions | 19 mm x 19 mm | — |
| FPGA Architecture | Cyclone V SE | — |
| Montaj Türü | Surface mount | Surface Mount (BGA) |
| Integrated Processor | Yes | — |
| Logic Technology | Field-programmable gate array | — |
| Device Category | Embedded system-on-chip FPGA | — |
| RoHS Durumu | unknown | Compliant |
| REACH Status | unknown | — |
| AEC-Q100 Status | unknown | — |
| İşletim Sıcaklığı Aralığı | [DATA_NEEDED: operating temperature range] | — |
| Besleme Gerilimi | [DATA_NEEDED: supply voltage range] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Bellek Türü | [DATA_NEEDED: memory type and capacity] | — |
| Family | — | Cyclone V SE SoC FPGA |
| HPS | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Clock Frequency | — | 800 MHz |
| Embedded Memory | — | 1,400 Kbits |
| DSP Blocks (18x18 Multipliers) | — | 66 |
| User I/O Pins | — | 145 |
| LVDS Support | — | Up to 1.25 Gbps |
| Process Technology | — | 28 nm TSMC low-power |
| İşletim Sıcaklığı | — | -40C to +100C (Industrial) |
| Voltage - Input (Max) | — | 1.1 V core |
| Peripherals | — | USB 2.0 OTG, Gigabit Ethernet, CAN, UART, SPI, I2C, NAND/NOR flash controllers |
| HPS-FPGA Interconnect | — | AXI bridges (3 master / 3 slave), FPGA-to-HPS SDRAM, DMA |