5M160ZM100C5N vs 5M160ZM68C5N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci 5M160ZM100C5N disebabkan oleh Altera dan 5M160ZM68C5N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | 5M160ZM100C5N | 5M160ZM68C5N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Device Family | MAX V | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | — |
| Logic Elements | 160 | — |
| Maximum Internal Frequency | 184 MHz | — |
| Propagation Delay (tPD) | 7.9 ns | — |
| User I/Os | 79 | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Configuration Memory | Internal Flash (non-volatile) | Non-volatile flash (instant-on, no boot PROM required) |
| Programming Interface | JTAG (IEEE 1532 / IEEE 1149.1) | JTAG (IEEE Std. 1149.1), in-system programmable |
| Kemasan | 100-ball Micro FBGA (MBGA-100), 6 x 6 mm, 0.5 mm pitch | — |
| Suhu Operasi | 0C to +85C (commercial) | — |
| Jenis Pemasangan | Surface Mount | — |
| Status RoHS | Compliant | Compliant |
| Aras MSL | 3 (168 hours) | [DATA_NEEDED: MSL level] |
| Supported I/O Standards | LVCMOS, LVTTL, PCI (Bank 1 only via VCCIO) | — |
| Family | — | MAX V CPLD |
| Series | — | 5M160Z |
| Macrocells | — | 128 |
| Logic Elements (typical) | — | 160 |
| Maximum Operating Frequency | — | 118.3 MHz |
| Pin-to-Pin Logic Delay | — | 7.5 ns |
| Number of Logic Array Blocks (LABs) | — | 4 |
| User Flash Memory | — | 8 Kbits |
| Core Supply Voltage | — | 1.8 V |
| I/O Standards Supported | — | LVTTL, LVCMOS 1.5/1.8/2.5/3.3 V |
| Package Type | — | 68-ball Micro FineLine BGA (MBGA) |
| Gambaran Suhu Operasi | — | 0C to +85C (commercial) |
| Internal Oscillator | — | Yes (on-chip) |
| Lead-Free | — | Yes |