5M160ZM100C5N vs 5M160ZM68C5N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng 5M160ZM100C5N sa pamamagitan ng Altera at 5M160ZM68C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro 5M160ZM100C5N 5M160ZM68C5N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
Device Family MAX V —
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 128 —
Logic Elements 160 —
Maximum Internal Frequency 184 MHz —
Propagation Delay (tPD) 7.9 ns —
User I/Os 79 —
Core Voltage (VCCINT) 1.8 V —
I/O Voltage (VCCIO) 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Configuration Memory Internal Flash (non-volatile) Non-volatile flash (instant-on, no boot PROM required)
Programming Interface JTAG (IEEE 1532 / IEEE 1149.1) JTAG (IEEE Std. 1149.1), in-system programmable
Packhaging 100-ball Micro FBGA (MBGA-100), 6 x 6 mm, 0.5 mm pitch —
Temperature na Operasyon 0C to +85C (commercial) —
Uri ng Pagpapasok Surface Mount —
Tindminan RoHS Compliant Compliant
Level ng MSL 3 (168 hours) [DATA_NEEDED: MSL level]
Supported I/O Standards LVCMOS, LVTTL, PCI (Bank 1 only via VCCIO) —
Family — MAX V CPLD
Series — 5M160Z
Macrocells — 128
Logic Elements (typical) — 160
Maximum Operating Frequency — 118.3 MHz
Pin-to-Pin Logic Delay — 7.5 ns
Number of Logic Array Blocks (LABs) — 4
User Flash Memory — 8 Kbits
Core Supply Voltage — 1.8 V
I/O Standards Supported — LVTTL, LVCMOS 1.5/1.8/2.5/3.3 V
Package Type — 68-ball Micro FineLine BGA (MBGA)
Hanay ng Temperature na Operasyon — 0C to +85C (commercial)
Internal Oscillator — Yes (on-chip)
Lead-Free — Yes

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