5M160ZM68A5N vs 5M160ZM68C5N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci 5M160ZM68A5N disebabkan oleh Altera dan 5M160ZM68C5N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | 5M160ZM68A5N | 5M160ZM68C5N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Family | MAX V | MAX V CPLD |
| Device Variant | 5M160Z (128 macrocells, 1.8 V, speed grade -7) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 4 | — |
| User I/Os | 52 | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Propagation Delay (tPD) | 14 ns | — |
| Standby Current (ICCSTBY) | 25 uA (typical) | — |
| Core Supply Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Kemasan | 68-ball FBGA (FineLine BGA), 0.5 mm pitch | — |
| JEDEC Package Code | S-PBGA-B68 | — |
| Jenis Pemasangan | Surface Mount (BGA) | — |
| Suhu Operasi | -40C to +125C (industrial) | — |
| Programming Interface | IEEE Std 1149.1 JTAG BST | JTAG (IEEE Std. 1149.1), in-system programmable |
| Automotive Qualification | AEC-Q100 | — |
| Status RoHS | Compliant | Compliant |
| Series | — | 5M160Z |
| Logic Elements (typical) | — | 160 |
| Maximum Operating Frequency | — | 118.3 MHz |
| Pin-to-Pin Logic Delay | — | 7.5 ns |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Core Supply Voltage | — | 1.8 V |
| I/O Standards Supported | — | LVTTL, LVCMOS 1.5/1.8/2.5/3.3 V |
| Package Type | — | 68-ball Micro FineLine BGA (MBGA) |
| Gambaran Suhu Operasi | — | 0C to +85C (commercial) |
| Configuration Memory | — | Non-volatile flash (instant-on, no boot PROM required) |
| Internal Oscillator | — | Yes (on-chip) |
| Lead-Free | — | Yes |
| Aras MSL | — | [DATA_NEEDED: MSL level] |