ADC12040CIVY vs ADC12020CIVY Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci ADC12040CIVY disebabkan oleh Texas Instruments dan ADC12020CIVY disebabkan oleh Texas Instruments. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Texas Instruments
ADC12040CIVY - 12-Bit 40MSPS Pipelined ADC | Texas Instruments
ADC12040CIVY ✓ AktifTexas Instruments
ADC12020CIVY - 12-Bit 20MSPS ADC | Texas Instruments | TQFP-32
ADC12020CIVY ✓ AktifPengandingan Spesifikasi
| Parametr | ADC12040CIVY | ADC12020CIVY |
|---|---|---|
| Merek | Texas Instruments | Texas Instruments |
| Kategori | ADC/DAC | ADC/DAC |
| Status Lingkungan Hidup | Aktif | Aktif |
| Pemecahkatan | 12 bit | 12 bits |
| kadar sampling | 40 MSPS (min 40 MSPS over temperature) | — |
| Number of Channels | 1 input | — |
| Architecture | Pipelined | — |
| Tegangan Pemberi Arus | +5V ±5% (single supply) | — |
| Power Consumption | 340 mW (typ) at 40 MHz | — |
| Differential Non-Linearity (DNL) | ±0.4 LSB (typ) | — |
| Signal-to-Noise Ratio (SNR) | 69 dB (typ) at fIN = 10 MHz | — |
| Effective Number of Bits (ENOB) | 11.2 bits (typ) at fIN = 10 MHz | 11.3 bits (typ) at fIN = 10.1 MHz |
| Input Type | Differential (single-ended capable) | Single-ended analog input |
| Reference Type | External, with internal buffer | — |
| Digital Output Interface | Parallel, CMOS, straight binary | — |
| Digital Output Logic Levels | 2.35V to 5V compatible | — |
| Power Down Mode | On-chip (low quiescent between conversions) | Yes |
| Gambaran Suhu Operasi | -40C to +85C (industrial) | — |
| Kemasan | 32-LQFP (NEY) 7x7 mm | 32-LQFP (CIVY) 7x7 mm |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Pin Family Compatibility | Pin compatible with ADC12010, ADC12020, ADC12L063, ADC12L066 | — |
| Status RoHS | Compliant (NOPB suffix variants only; check exact suffix) | Compliant (per /NOPB suffix option) |
| Sampling Rate (FS) | — | 20 MSPS (min) |
| Number of Input Channels | — | 1 |
| Conversion Architecture | — | Pipelined with internal sample-and-hold |
| Analog Supply Voltage (AVDD) | — | +5 V (single) / +5 V analog with ±5 V option |
| Digital Supply Voltage (DVDD) | — | 2.35 V to 5 V |
| Differential Nonlinearity (DNL) | — | ±0.35 LSB (typ) |
| Power Consumption (20 MHz) | — | 185 mW (typ) |
| Reference Buffer | — | On-chip |
| Digital I/O Compatibility | — | TTL/CMOS, 2.35 V to 5 V |
| Suhu Operasi | — | -40C to +85C |
| Aras MSL | — | [DATA_NEEDED: MSL level] |