EP1K100FC484-2N vs EP1K100FC484-3N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1K100FC484-2N disebabkan oleh Intel dan EP1K100FC484-3N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EP1K100FC484-2N - 100K Gates ACEX-1K FPGA 333 I/O 484-FBGA | Intel
EP1K100FC484-2N ⚠ Bahagian terakhir untuk beliIntel
EP1K100FC484-3N - 100K-Gate ACEX 1K FPGA, 484-BGA | Intel
EP1K100FC484-3N ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP1K100FC484-2N | EP1K100FC484-3N |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | Masa Terakhir Dibeli |
| Harga Unit (USD) | — | $65.10 |
| Family | ACEX-1K | ACEX 1K |
| Logic Elements | 4,992 | 4,992 |
| Typical Gates | 100,000 | — |
| Embedded Memory (EAB) | 49,152 bits | — |
| Maximum User I/O | 333 | — |
| Kemasan | 484-ball FBGA | 484-ball FBGA |
| Core Voltage | 2.5 V | — |
| Process Technology | 0.22 µm SRAM | 0.22 µm CMOS |
| Speed Grade | -2 (commercial) | -3 |
| Suhu Operasi | [DATA_NEEDED: operating temperature range] | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Configuration Method | SRAM, JTAG (IEEE 1149.1) | Passive Serial, JTAG, PPA |
| Programmable I/O Standards | LVTTL, LVCMOS, PCI, SSTL-2/3, GTL+ | — |
| Status RoHS | [DATA_NEEDED: non-leaded vs leaded suffix; -2N suffix indicates non-leaded per Altera naming] | [DATA_NEEDED: RoHS status] |
| Lead Status | Contains lead (legacy non-Pb-free suffix -2N) | — |
| Typical Gate Count | — | 100,000 gates |
| Logic Array Blocks (LABs) | — | 624 |
| Embedded Array Blocks (EABs) | — | 12 |
| Total RAM Bits | — | 49,152 |
| User I/Os | — | 333 |
| Operating Voltage (VCCINT) | — | 2.5 V |
| Internal Operating Frequency | — | up to 200 MHz |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, 2.5V/3.3V/5V multiVolt I/O |
| Operating Temperature (Commercial) | — | 0 °C to +70 °C |
| Boundary-Scan Test | — | IEEE 1149.1 (JTAG) |