EP1S10F484C5N vs EP1S10F484C6N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1S10F484C5N disebabkan oleh Intel dan EP1S10F484C6N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP1S10F484C5N EP1S10F484C6N
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Series Stratix —
Family Stratix (original) Stratix
Logic Elements (LEs) 10,570 —
Logic Array Blocks (LABs) 1,057 —
Embedded Memory Bits 920,448 —
TriMatrix Memory Blocks 14 —
Embedded DSP Blocks 6 (≈48 9-bit multipliers) —
PLLs 4 —
Global Clock Networks 12 —
Maximum User I/O 335 —
User I/O Standard Support LVDS, LVPECL, PCI-X, RapidIO, DDR —
Process Technology 0.13 µm CMOS 130 nm CMOS
Core Voltage (VCCINT) 1.5 V —
Maximum Internal Frequency 500 MHz (per Stratix datasheet) —
Operating Temperature (TJ) 0 °C to 85 °C (Commercial) —
Kemasan 484-ball FCBGA (F484), 23 x 23 mm, 1.0 mm pitch 484-FBGA (23 × 23 mm, 1.0 mm pitch)
Jenis Pemasangan Surface Mount Surface Mount (SMT)
Configuration Method JTAG / Passive Serial / Active Serial SRAM - volatile (JTAG / passive serial / passive parallel / fast passive parallel)
Device Status Obsolete - last time buy completed —
Design Toolchain Quartus II (≤ v13.0) —
Logic Elements / Cells — 10,570
Number of LABs / CLBs — 1,057
Total RAM Bits — 920,448
Number of User I/O — 335
Supply Voltage - Operating — 1.425 V to 1.575 V (core 1.5 V)
Speed Grade — C6
Suhu Operasi — 0 °C to 85 °C (TJ)
Lead Free — Yes
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS
On-chip Resources — TriMatrix memory (M512, M4K, M-RAM), DSP blocks, PLLs

Laporan Datasheet & Sumber

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