EP1S20B672C7N vs EP1S20F672C7N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1S20B672C7N disebabkan oleh Intel dan EP1S20F672C7N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP1S20B672C7N EP1S20F672C7N
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Series Stratix Stratix (first generation)
Family Stratix (original) Stratix
Process Technology 0.13 µm CMOS 130 nm CMOS
Logic Elements (LEs) 18,460 18,460
LABs / CLBs 1,846 —
Embedded Memory Bits 1,669,248 bits —
Maximum User I/O 426 586
Number of Pins / Balls 672 —
Package Type 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) —
Supply Voltage (Core, VCCINT) 1.5 V —
Suhu Operasi 0 °C to 85 °C (Commercial Extended) 0°C to +85°C (commercial)
Speed Grade -7 C7 (-7)
Jenis Pemasangan Surface Mount (BGA) Surface Mount
Aras MSL 3 (per JEDEC J-STD-020) [DATA_NEEDED: moisture sensitivity level]
Logic Family CMOS —
Status RoHS [DATA_NEEDED: RoHS compliance] —
Lead-Free [DATA_NEEDED: lead-free status] —
Logic Cells — 18,460
Configurable Logic Blocks (CLBs) — 2,132
Embedded Memory (TriMatrix) — 1,669,248 bits (426 Kbit total)
DSP Blocks — 56 (dedicated 18x18 multipliers)
I/O Banks — [DATA_NEEDED: I/O bank count]
PLLs — Up to 12
Maximum Operating Frequency — 420.17 MHz
Core Voltage — 1.5 V
Kemasan — 672-FBGA (FineLine BGA)
Package Body Size — 35 mm x 35 mm
Ball Pitch — 1.27 mm
Lead-Free / RoHS — Yes (lead-free finish, RoHS compliant)
Configuration Modes — PS, PPS, FPP, JTAG

Laporan Datasheet & Sumber

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