EP1S20B672C7N vs EP1S20F672C7N 对比

详细并排对比 EP1S20B672C7N 出自 Intel 和 EP1S20F672C7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S20B672C7N EP1S20F672C7N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $320.00 $109.20
Series Stratix Stratix (first generation)
Family Stratix (original) Stratix
Process Technology 0.13 µm CMOS 130 nm CMOS
Logic Elements (LEs) 18,460 18,460
LABs / CLBs 1,846 —
Embedded Memory Bits 1,669,248 bits —
Maximum User I/O 426 586
Number of Pins / Balls 672 —
Package Type 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) —
Supply Voltage (Core, VCCINT) 1.5 V —
工作温度 0 °C to 85 °C (Commercial Extended) 0°C to +85°C (commercial)
Speed Grade -7 C7 (-7)
安装类型 Surface Mount (BGA) Surface Mount
MSL 等级 3 (per JEDEC J-STD-020) [DATA_NEEDED: moisture sensitivity level]
Logic Family CMOS —
RoHS 状态 [DATA_NEEDED: RoHS compliance] —
Lead-Free [DATA_NEEDED: lead-free status] —
Logic Cells — 18,460
Configurable Logic Blocks (CLBs) — 2,132
Embedded Memory (TriMatrix) — 1,669,248 bits (426 Kbit total)
DSP Blocks — 56 (dedicated 18x18 multipliers)
I/O Banks — [DATA_NEEDED: I/O bank count]
PLLs — Up to 12
Maximum Operating Frequency — 420.17 MHz
Core Voltage — 1.5 V
封装 — 672-FBGA (FineLine BGA)
Package Body Size — 35 mm x 35 mm
Ball Pitch — 1.27 mm
Lead-Free / RoHS — Yes (lead-free finish, RoHS compliant)
Configuration Modes — PS, PPS, FPP, JTAG

数据手册与资源

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