EP1S80F1020C6N vs EP1S80F1020C5N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1S80F1020C6N disebabkan oleh Intel dan EP1S80F1020C5N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EP1S80F1020C6N - Stratix 79,040 Logic Elements FPGA | Intel (Altera) | 1020-BGA
EP1S80F1020C6N NrndPengandingan Spesifikasi
| Parametr | EP1S80F1020C6N | EP1S80F1020C5N |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Akhir Hidup |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Stratix | — |
| Logic Cells / Logic Elements | 79,040 | — |
| Equivalent Gate Count | 7,427,520 | — |
| Number of LABs/CLBs | 7904 | — |
| Number of User I/Os | 773 | — |
| Kemasan | 1020-ball FBGA (FC-FBGA), 33 x 33 mm, 1 mm pitch | — |
| Process Technology | 130 nm CMOS | — |
| Core Supply Voltage | 1.5 V | — |
| Suhu Operasi | 0C to 85C (Commercial) | 0 °C to 85 °C |
| Speed Grade | C6 | C5 |
| Jenis Pemasangan | Surface Mount (SMT) | Surface Mount |
| Operating Frequency (typ.) | 450 MHz (Stratix family max) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Tingkat sensitiviti Air Nama (MSL) | [DATA_NEEDED: MSL level] | — |
| Configuration Memory Interface | Serial (EPCS) or parallel - per Stratix family | — |
| Product Type | — | Field Programmable Gate Array (FPGA) |
| Device Family | — | Stratix |
| Logic Technology | — | CMOS |
| Logic Elements | — | 79,040 |
| Logic Cells | — | 9,191 |
| Logic Array Blocks | — | 7,904 |
| User I/O Pins | — | 773 I/O |
| Total Package Pins or Balls | — | 1,020 |
| Package Type | — | FBGA-1020 |
| Package Dimensions | — | 33 mm x 33 mm |
| Ball Pitch | — | 1 mm |
| Tegangan Pemberi Arus | — | [DATA_NEEDED: operating supply voltage] |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | not_applicable |
| Embedded Memory Capacity | — | [DATA_NEEDED: embedded memory capacity] |
| Phase-Locked Loops | — | [DATA_NEEDED: PLL count] |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |