EP1SGX25DF1020C5ES vs EP1SGX25DF1020C6ESL Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1SGX25DF1020C5ES disebabkan oleh Altera dan EP1SGX25DF1020C6ESL disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP1SGX25DF1020C5ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera
EP1SGX25DF1020C5ES ⚠ Bahagian terakhir untuk beliAltera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL ObsoletePengandingan Spesifikasi
| Parametr | EP1SGX25DF1020C5ES | EP1SGX25DF1020C6ESL |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | Obsolete |
| Device Family | Stratix GX | — |
| Logic Family | CMOS | — |
| Logic Elements (LEs) | 25,660 | — |
| Configurable Logic Blocks (CLBs) | 2,566 | — |
| Embedded Memory | 1,944,576 bits | — |
| Process Technology | 130 nm | — |
| Core Supply Voltage | 1.5 V | — |
| Package Type | FBGA-1020 (FineLine BGA) | — |
| Package Dimensions | 33 x 33 mm | — |
| Ball Pitch | 1.00 mm | — |
| Lead-Free | Yes | — |
| Suhu Operasi | 0 °C to 85 °C (commercial) | — |
| Speed Grade | C5 | C6 |
| Part Variant Suffix | ES (Engineering Sample) | — |
| Configuration Interface | JTAG (IEEE 1149.1) / Passive Serial | — |
| Family | — | Stratix GX |
| Logic Elements | — | 25,660 |
| Total RAM Bits | — | 1,944,576 bits |
| User I/O Pins | — | 607 |
| LABs/CLBs | — | 2,566 |
| Kemasan | — | 1020-BBGA (FineLine BGA) |
| Core Voltage | — | 1.5 V |
| Suhu Hubungan Operasi | — | 0 C to 85 C |
| Jenis Pemasangan | — | Surface Mount |
| Status RoHS | — | [DATA_NEEDED: RoHS status] |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Process Node | — | 0.13 um CMOS |
| Transceivers | — | Embedded multi-gigabit transceivers (per Stratix GX family) |
| DSP Blocks | — | Yes (embedded DSP blocks) |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) |